• 한국전기전자재료학회논문지
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• 제15권7호
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• pp.591-596
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• 2002

In this work, epitaxial GaN is grown on sapphire substrate in AlGaN/GaN heterostructures. Deliberate oxygen doping of GaN grown by MOVPE has been studied. The electron concentration increased as a function of the square root of the oxygen partial Pressure. Oxygen is a shallow donor with a thermal ionization energy of $27\pm2 meV$ measured by temperature dependent Hall effects. A compensation ratio of $\theta$=0.3~0.4 was determined from Hall effect measurements. The formation energy of $O_N$ of $E^F$ =1.3eV determined from the experimental data, is lower than the theoretically predicted vague.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
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• pp.212-213
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• 2008

This paper describes the analysis of the device characteristics of the NPT type 1200V Insulated gate Bipolar Transistor. In case of NPT type IGBT devices, optimized n-epi layer thickness and concentration is important to obtain low on-state voltage and breakdown voltage characteristics. In this paper, we analyzed on-state and off-state characteristics of NPT type IGBT. Breakdown voltage of designed IGBT was higher than 1200V when we optimized Field Limiting Ring structures. And also, on-state voltage characteristics was shown less then 2.5V at 25A of drain current.

• 한국전기전자재료학회논문지
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• 제30권4호
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• pp.210-213
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• 2017

In this paper, we analyzed the structural design and electrical characteristics of a 3.3 kV super junction FS IGBT as a next generation power device. The device parameters were extracted by design and process simulation. To obtain optimal breakdown voltage, we researched the breakdown characteristics. Initially, we confirmed that the breakdown voltage decreased as trench depth increased. We analyzed the breakdown voltage according to p pillar dose. As a result of the experiment, we confirmed that the breakdown voltage increased as p pillar dose increased. To obtain more than 3.3 kV, the p pillar dose was $5{\times}10^{13}cm^{-2}$, and the epi layer resistance was $140{\Omega}$. We extracted design and process parameters considering the on state voltage drop.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1998년도 춘계학술대회 논문집
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• pp.423-426
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• 1998

Piezoresistive pressure sensors have fabricated using electrochemical etch-stop technique. Si diaphragm having thickness of n-epi. layer was fabricated and used to detect pressure range from 0 to 1 kg/$\textrm{cm}^2$. Piezoresistors were diffused 3${\times}$10$\^$18/ cm$\^$-3/ and placed at diaphragm edge for maximum pressure detection. The characteristics of electrochemical etch-stop in TMAH/lPA/pyrazine solution were also discussed. I-V curves of n and p-type Si in TMAH/lPA/pyrazine solution were obtained. Etching rate is highest at optimum etching condition, TMAH 25wt.%/IPA 17vo1.%/pyrazine 0.1/100m1, thus the elapsed time of etch-stop was reduced.

• 한국전기전자재료학회논문지
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• 제27권8호
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• pp.501-504
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• 2014

This paper was developed and described core-process to implement low on resistance which was the most important characteristics of SJ (super junction) MOSFET. Firstly, using process-simulation, SJ MOSFET optimal structure was set and developed its process flow chart by repeated simulation. Following process flow, gate level process was performed. And source and drain level process was similar to genral planar MOSFET, so the process was the same as the general planar MOSFET. And then to develop deep trench process which was main process of the whole process, after finishing photo mask process, we developed deep trench process. We expected that developed process was necessary to develop SJ MOSFET for automobile semiconductor.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2002년도 추계학술대회 논문집 전기물성,응용부문
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• pp.13-15
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• 2002

The trench MOSFET structure is characterized by reduced on-resistance due to elimination of $R_{JFET}$ and high packing density. An analytical calculation of Ron as the sum of $R_{ch}$ and $R_{epi}$ has been reported previously for the trench MOSFET structure. However, the accumulation layer resistance may not be neglected for Trench MOSFET especially for a relatively large value of the cell spacing, where a major contribution to Ron comes from Ra as the simulation results in this paper shows.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2004년도 하계학술대회 논문집 Vol.5 No.1
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• pp.361-364
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• 2004

Surface doped SOI RESURF LDMOSFET with recessed source region is proposed to improve the on- and off-state characteristics. Surface region of the proposed LDMOS structure is doped like step. The characteristics of the proposed LDMOS is verified by two-dimensional process simulator ATHENA and device simulator ATLAS[1]. The numerically calculated on-resistance($R_{ON}$) of the proposed LDMOS is $10.36\Omega-cm$ and breakdown voltage is 205V when $L_{dr}=7{\mu}m$ with step doped surface.

• 한국전기전자재료학회논문지
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• 제27권10호
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• pp.613-617
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• 2014

This paper was analyzed electrical characteristics of super junction power MOSFET considering to charge imbalance. We extracted optimal design and process parameter at -15% of charge imbalance. Considering extracted design and process parameters, we fabricated super junction MOSFET and analyzed electrical characteristics. We obtained 600~650 V breakdown voltage, $224{\sim}240m{\Omega}$ on resistance. This paper was showed superior on resistance of super junction MOSFET. We can use for automobile industry.

• 한국전기전자재료학회논문지
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• 제36권4호
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• pp.413-417
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• 2023

Gallium Oxide (Ga₂O₃) is preferred as a material for next generation power semiconductors. The Ga₂O₃ should solve the disadvantages of low thermal resistance characteristics and difficulty in forming an inversion layer through p-type ion implantation. However, Ga₂O₃ is difficult to inject p-type ions, so it is being studied in a heterojunction structure using p-type oxides, such as NiO, SnO, and Cu₂O. Research the lateral-type FET structure of NiO/Ga₂O₃ heterojunction under the Gate contact using the Sentaurus TCAD simulation. At this time, the VG-ID and VD-ID curves were identified by the thickness of the Epi-region (channel) and the doping concentration of NiO of 1×10¹⁷ to 1×10¹⁹ cm-3. The increase in Epi region thickness has a lower threshold voltage from -4.4 V to -9.3 V at I_D = 1×10^-8 mA/mm, as current does not flow only when the depletion of the PN junction extends to the Epi/Sub interface. As an increase of NiO doping concentration, increases the depletion area in Ga₂O₃ region and a high electric field distribution on PN junction, and thus the breakdown voltage increases from 512 V to 636 V at I_D =1×10^-3 A/mm.

• 한국결정성장학회지
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• 제9권3호
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• pp.273-279
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• 1999

Si(001)을 기판으로 한 GaN 박막을 성장하기 위하여 hot wall epitaxy(HWE) 장치를 자체 제작하였다. HWE 장치를 이용하여 Si(001) 기판 위에 GaN 박막에 대한 상온에서의 광 발광(PL) 측정에서 GaN 초기층 성장온도가 $700^{\circ}C$ 보다 낮은 온도 조건에서 성장된 GaN 박막이 Zinc blende 구조와 Wurzite 구조가 혼합되어 성장되어지는 것으로 추측되며, $700^{\circ}C$ 이상의 온도에서는 성장된 GaN 박막이 주로 wurtzite 구조로 성장된다는 것을 알 수 있다. 그리고 x-선 회절 측정으로부터 성장한 GaN 박막이 Zinc blende와 Wurtzite의 두가지 구조가 혼합된 형태로 성장되었다는 것을 알 수 있었다. GaN 박막을 성장하기 위한 조건에서 초기층 성장조건은 증발부의 온도 $860^{\circ}C$와 기판부의 온도가 $720^{\circ}C$ 근처에서 4분동안 성장하였을 때 Wurtzite의 특성을 보이며, GaN 박막의 성장조건은 기판부의 온도 $1020^{\circ}C$, 증발부의 온도 $910^{\circ}C$에서 그리고 Ammonia gas의 유량을 120 sccm으로 하였을 때 보다 안정한 Wurtzite 구조특성을 보이게 되었다.