• Journal of Institute of Control, Robotics and Systems
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• v.14 no.7
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• pp.711-719
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• 2008

Although non-real time simulation and pilot based evaluations are available for the development of flight control computer prior to real flight tests, there are still many risky factors. The control law designed for prototype aircraft often leads to degraded performance from the initial design objectives, therefore, the proper evaluation methods should be applied such that flight control law designed can be verified in real flight environment. The one proposed in this paper is IFS(In-Flight Simulator). Currently, this system has been implemented into the F-18 HARV(High Angle of Attack Research Vehicle), SU-27 and F-16 VISTA(Variable stability. In flight Simulation Test Aircraft) programs. This paper addresses the concept of switching mechanism for FLCC(Flight Control Computer)-SWMC(Switching Mechanism Computer) using 1553B communication based on flight control law of advanced supersonic trainer. And, the fader logic of TFS(Transient Free Switch) and stand-by mode of reset '0' type are designed to reduce abrupt transient and minimize the integrator effect in pitch axis control law. It hans been turned out from the pilot evaluation in real time that the aircraft is controllable during the inter-conversion process through the flight control computer, and level 1 handling qualities are guaranteed. In addition, flight safety is maintained with an acceptable transient response during aggressive maneuver performed in severe flight conditions.

• Aerospace Engineering and Technology
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• v.8 no.1
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• pp.49-57
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• 2009

The camera electronics in the KOMPSAT-3 payload provides the several control clocks in order to move the charges, which are converted from the light in the pixel, in the vertical and horizontal direction. Generally, the control clocks depend on the CCD internal design in the system. The KOMPSAT-3 payload uses the CCD controlled by 3-phase vertical clocks and 4-phase timing. The camera generates the various clocks such as the vertical clocks, the horizontal clocks, the summing clocks, the reset clocks and so on. The vertical clocks are deeply related to the camera performance and synchronized with satellite scan-rate even though they are relatively slow. Also, it gives the horizontal clocks without distortion under the very fast pixel-rate. This paper shows the design and simulation of the CCD clocks driver for the KOMPSAT-3 payload.

• Journal of the Korean Home Economics Association
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• v.18 no.2
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• pp.63-68
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• 1980

In a rapidly changing Korean society, the role of home economics in ideological education and practical professionalism is faced to be reset. In this article the author reviews home economics and career opportunities. the following issues were discussed in detail : 1. Home Economics and Occupation ; a) As professionals in the field of home economics, job applicants must carry their message in person to potential employers. Employers must be taught that persons with home economics degrees have the capabilities and qualifications to fill a variety of positions. b) In may of 1977, Vocational Education Coalition was established by American Home economics association (AHEA), American Vocational Association, and Home Economics Education association This coalition defined the vocational education as occupation of homemaking and paid employment in home economics occupations for women and men. 2. Home Economics in business: Twelve percent of the total membership of the AHEA is affiliated with the home economics in business section. A professional management consultant, Dr. strain's viewpoint and corning Glass Work's case about business value in the home economics were summarized; a) Why a business employs a home economist. b) Why a business does not employ a home economist. c) Enhancing the home economist's value. d) Home economist's roles in corning Glass works. 3. Creating a Career: a) Mrs. Maineri's story. b) Family financial counselors. c) Home economist and displaced homemaker. d) Job opportunities in international services. Since the role of home economics in Korea has had little perception in professionalism, the following issues require immediate and serious attention to enhance career opportunities for home economists: Employers and government's recognition of home economist's value, Home economist's attitude to enhance their value, Fair employment and sex discrimination, Curricula adjustment, and Support from women's organization for employment opportunities, fair treatment, top jobs, etc.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.1555-1558
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• 2008

Various approaches were undertaken by major PDP makers in order to improve the luminous efficacy of the plasma discharge cells. There have been many reports that state that using a high Xe content PDP is one of the most promising key technologies available to improve the luminous efficacy. In the case of the higher Xe content panel, the higher address and sustain voltage were needed to drive the panel under the same reset condition. In this study, a variety of Xe content panels were investigated in order to examine wall voltage transfer behaviors. The transferred wall voltage status after addressing discharge at the same driving condition was analyzed by comparing Vt close curve of high and low Xe content panels. Through this analysis of Vt close curve difference, the driving waveform of a high Xe panel was quantitatively adjusted Under the same address voltage condition, results showed that the amount of the transferred wall voltage and Vt close curve after addressing discharge was matched for the first sustain discharge. Taking these results into consideration, we conclude that the driving waveform for different Xe content panels could be designed for the desired addressing discharge condition and the wall voltage state of the cell could be quantitatively controlled and measured through these approaches.

• The Transactions of the Korean Institute of Power Electronics
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• v.12 no.5
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• pp.400-408
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• 2007

In this paper, development of the 8kW parallel module converter is presented. For a effective configuration of FB-PWM converter, this paper proposes 4-parallel operation of 2 kw-module. FB converter of 2-kW module is controlled by phase shut PWM and in order to achieve ZVZCS, the simple auxiliary circuit is applied in secondary side. In order to achieve ZCS, control logic for auxiliary circuit operation is designed to reset the primary current during free-wheeling period. For output current sharing of 4-modules, the charge control is employed. The charge control logic is designed with phase shift PWM logic. Voltage controller is implemented by using DSP(TMS320LF2406) with A/D conversion data of the output current and voltage of each module. The developed converter is installed in PCU(Power Conditioning Unit) for HSG(High Speed Generator) in a vehicle and health monitoring system is implemented for vehicle operation test. Finally, performance of the developed converter is proved under practical operation of HSG.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.11
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• pp.16-23
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• 2009

A 12b 10MS/s pipelined ADC with low DC gain amplifiers is presented. The pipelined ADC using a reference scaling technique is proposed to compensate the gain error in MDACs due to a low DC gain amplifier. To minimize the performance degradation of the ADC due to amplifier offset, the proposed offset trimming circuit is employed m the first-stage MDAC amplifier. Additional reset switches are used in all MDACs to reduce the memory effect caused by the low DC gain amplifier. The measured differential and integral non-linearities of the prototype ADC with 45dB DC gain amplifiers are less than 0.7LSB and 3.1LSB, respectively. The prototype ADC is fabricated in a $0.35{\mu}m$ CMOS process and achieves 62dB SNDR and 72dB SFDR with 2.4V supply and 10MHz sampling frequency while consuming 19mW power.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.3
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• pp.174-178
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• 2013

A modified driving waveform is proposed to improve the address discharge characteristics using wall charge on the common electrodes in plasma display panel. In the driving scheme of plasma display, after a reset period, the negative charge are accumulated on two front electrodes and positive wall charge are accumulated on the address electrode. As the address discharge during an address period is produced when the scan and address pulses are applied at the same time, negative charge on the scan electrodes and positive charge on the address electrodes are mainly used. On the other hand, as the voltage are only maintained without applying the waveform during an address period on the common electrodes, the wall charge is not used on the common electrodes. In this paper, the address discharge characteristics are investigated with changing pulse applying time and applied voltage amplitude on the common electrodes and consequently the producing time of an address discharge are shortened about 200 ns compared with the conventional driving waveform.

• Fashion & Textile Research Journal
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• v.18 no.1
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• pp.80-90
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• 2016

This study presents quantitative evaluation standards for they mobility test, conducted in the process of a slacks fit test. This study quantified the subjects' evaluation on the wearability of slacks to provide objective qualitative evaluation methods for existing mobility tests. The subjects were women of standard bodytype between the ages of 18 and 24 wearing slacks designed to test their mobility based on differences in ease in waist girth, hip girth, crotch length and knee length. A qualitative evaluation tested the wearability of slacks. Clothing pressure and gap area between the body and slacks were measured based on a quantitative evaluation. The clothing pressure and the gap area between the body and slacks (which reflect the results of the wearability test) were presented in this study as quantitative evaluation standards. Clothing pressure tended to increase as the ease of slacks decreased; however, clothing pressure standards, that induce discomfort, differed by body parts. The hip, crotch, and knee area were relatively less sensitive despite the waist and the abdominal area sensitivity to clothing pressure. This study suggests the minimum ease for the appropriate wearing comfort of slacks by region and motion as standards for the quantitative evaluation of mobility tests. These was reset in accordance to the limits of clothing pressure when the minimum ease was considered as wearable but exceeded the clothing pressure limits.

• Journal of the Microelectronics and Packaging Society
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• v.13 no.2 s.39
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• pp.15-19
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• 2006

The resistance switching characteristics of amorphous $SiO_2$ and poly-crystalline $TiO_2$ were investigated. Both films exhibit well defined switching characteristics with low and high resistance states. From I-V curve analyses, it was found that the low resistance states of both films obey an ohmic conduction mechanism and the high resistance states show generation of a Schottky potential barrier. Regarding the mechanism for resistance switching of the binary oxide, it is suggested that the generation and annihilation of potential barriers accounts for the changes to the high resistance state and low resistance state, respectively. The device operation characteristic parameters such as reset and set voltages of $TiO_2$ are distinctly smaller than those of $SiO_2$, indicating that the values are related to the dielectric constant.

• Journal of IKEEE
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• v.22 no.3
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• pp.590-598
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• 2018

Recently, interest in IoT(Internet of Things) technology, which provides Internet services to objects, is increasing. IoT offers a variety of services in home networks, healthcare, and disaster alerts. IoT with LLN(Low Power & Lossy Networks) feature frequently loses sensor node. RPL, the standard routing protocol of IoT, performs global repair when data loss occurs in a sensor node. However, frequent loss of sensor nodes due to lower sensor nodes causes network performance degradation due to frequent full path reset. In this paper, we propose an additional selection method of the storage mode sensor node to solve the network degradation problem due to the frequent path resetting problem even after selecting the storage mode sensor node, and propose a method of equalizing the total path resetting number of each instance.