• Title/Summary/Keyword: synchronization algorithm

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Performance Analysis of an Efficient Frame Synchronization Scheme using FFT Window Position Restoration Algorithm for OFDM Systems (OFDM System에서 FFT 윈도우 위치 복원 알고리즘을 이용한 효율적인 프레임 동기방식의 성능분석)

  • Kim, Dong Ok;Yoon, Chong Ho
    • Journal of Advanced Navigation Technology
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    • v.5 no.1
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    • pp.45-53
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    • 2001
  • We present the frame synchronization scheme using the FFT window position restoration algorithm appropriate for wireless OFDM systems under multipath fading environment. From the restoration of the synchronization parameters of previous several frames, the algorithm can extract the synchronization parameters for the next frames. To analyze the performance of the proposed algorithm, we compare the probability of synchronization failure under time and frequency domains, respectively. From the simulation results, one can see that the algorithm in the time domain shows better performance than in the frequency one, for the $E_b/N_o$ of 6.0dB or more.

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Performance Analysis of Symbol Timing and Carrier Synchronization in Block Burst Demodulation of LMDS Uplink (LMDS 역방향 채널의 블록 버스트 복조에 대한 심벌타이밍과 반송파 동기의 성능 분석)

  • Cho, Byung-Lok;Lim, Hyung-Rea;park, Sol
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.10 no.1
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    • pp.99-108
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    • 1999
  • In this paper, we propose $\pi$/4 QPSK scheme with block modulation algorithm, which can reduce preamble in order to transmit ATM cell efficiently in the uplink channel of LMDS, and also designed a new carrier recovery circuit which can improve carrier synchronization performance of block demodulation algorithm. The $\pi$/4 QPSK scheme employing the proposed block modulation algorithm achieved efficient frame transmission by making use of a few preamble when carrier synchronization, symbol timing synchronization and slot timing synchronization were performed by burst data of ATM cell in LMDS environment. For performance evaluation of the proposed method, a simulation analyzing the variation of carrier synchronization, symbol timing synchronization and slot timing synchronization using LMDS environment and burst mode condition was executed. In the simulation, the proposed method showed a good performance even though the reduced preamble as a few aspossible when carrier synchronization, symbol timing synchronization and slot timing synchronization is performed.

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A Synchronization Tracking Algorithm to Compensate the Drift of Satellite in FH-FDMA Satellite Communication System (FH-FDMA 위성 통신 시스템에서 위성 드리프트 보정 동기추적 알고리즘)

  • Bae, Suk-Neung;Kim, Su-Il;Choi, Young-Kyun;Jin, Byoung-Il
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.33 no.2A
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    • pp.159-166
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    • 2008
  • In this paper, we proposed an algorithm to solve the problem that can't maintain hop synchronization using only early-late gate tracking loop due to the drift of geo-stationary satellite in frequency hopping satellite communication system. When the signal is transferred to downlink through DRT(Dehop-Rebop Transponder), the problem with synchronization loss is occurred periodically when using only early-late gate tracking loop, because of energy loss in each side portion of hop due to orbital variation of the satellite. To solve this problem, we have developed Anti-Shrink synchronization tracking algorithm which uses the prediction value of transmission timing and the structure of inner-outer gate instead of early-late gate with the ranging information. Through simulations, we showed that the performance of the Anti-Shrink algorithm is better than that of simple inner-outer energy ratio algorithm and similar to that of conventional early-late tracking loop algorithm with ranging information. No synchronization failure in the proposed algorithm was occurred because of less energy loss and robustness without the ranging information.

Synchronization of Bilateral Teleoperation System using Genetic Algorithm (유전자 알고리즘을 이용한 양방향 원격제어시스템의 동기화)

  • Kim, Byeong-Yeon;Ahn, Hyo-Sung
    • 한국HCI학회:학술대회논문집
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    • 2009.02a
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    • pp.2080-2082
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    • 2009
  • This paper presents synchronization of bilateral teleoperation system with time delay using genetic algorithm. In general, bilateral teleoperation system has two main goals; stability and transparency. In the presence of time delay between the master and the slave, we guarantee stability, and optimize the parameter of synchronization control law using genetic algorithm.

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Automatic carrier phase delay synchronization of PGC demodulation algorithm in fiber-optic interferometric sensors

  • Hou, Changbo;Guo, Shuai
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.14 no.7
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    • pp.2891-2903
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    • 2020
  • Phase-generated carrier (PGC) demodulation algorithm is the main demodulation methods in Fiber-optic interferometric sensors (FOISs). The conventional PGC demodulation algorithms are influenced by the carrier phase delay between the interference signal and the carrier signal. In this paper, an automatic carrier phase delay synchronization (CPDS) algorithm based on orthogonal phase-locked technique is proposed. The proposed algorithm can calculate the carrier phase delay value. Then the carrier phase delay can be compensated by adjusting the initial phase of the fundamental carrier and the second-harmonic carrier. The simulation results demonstrate the influence of the carrier phase delay on the demodulation performance. PGC-Arctan demodulation system based on CPDS algorithm is implemented on SoC. The experimental results show that the proposed algorithm is able to obtain and eliminate the carrier phase delay. In comparison to the conventional demodulation algorithm, the signal-to-noise and distortion ratio (SINAD) of the proposed algorithm increases 55.99dB.

A New Simplified Clock Synchronization Algorithm for Indoor Positioning (실내측위를 위한 새로운 클락 동기 방안)

  • Lee, Young-Kyu;Yang, Sung-Hoon;Lee, Seong-Woo;Lee, Chang-Bok;Kim, Young-Beom;Choe, Seong-Su
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.32 no.3A
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    • pp.237-246
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    • 2007
  • Clock Synchronization is one of the most basic factors to be considered when we implement an indoor synchronization network for indoor positioning. In this paper, we present a new synchronization algorithm which does not employ time stamps in order to reduce the hardware complexity and data overhead. In addition to that, we describe an algorithm that is designed to compensate the frequency drift giving an serious impact on the synchronization performance. The performance evaluation of the proposed algorithm is achieved by investigating MTIE (Maximum Time Interval Error) values through simulations. In the simulations, the frequency drift values of the practical oscillators are used. From the simulation results, it is investigated that we can achieve the synchronization performance under 10 ns when we use 1 second synchronization interval with 1 ns resolution and TCXOs (Tmperature Compensated Cristal Oscillators) both in the master clock and the slave clock.

Time Synchronization Algorithm based on FLL-Assisted-PLL for Telemetry System (FLL-Assisted-PLL 기반의 텔레메트리 시스템 정밀 시각동기 알고리즘)

  • Geon-Hee Kim;Mi-Hyun Jin
    • Journal of Advanced Navigation Technology
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    • v.26 no.6
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    • pp.441-447
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    • 2022
  • In this paper, we propose a FLL-assisted-PLL based time synchronization algorithm for telemetry systems where frequency and phase errors exist in time synchronization pulse. The telemetry system may analyze the flight state by acquiring the state information in the distributed system. Therefor, in order to collect each state information without errors, precise time synchronization between the master and the slave is required. At this time, the master's time pulse have frequency and phase changes that can be caused by external and internal factors, so a method to maintain precision time synchronization is essential to provide telemetry data continuously. We propose the FLL-assisted-PLL based algorithm that is capable of high-speed synchronization and has high time synchronization accuracy. The proposed algorithm is verified through python simulation, and the VHDL Logic has been implemented in FPGA to check the performance according to the frequency errors and phase errors.

Cryptographic synchronization signal generation method using maximal length sequence (최대길이 시퀀스를 이용한 암호동기신호 생성 기법)

  • Son, Young-ho;Bae, Keun-sung
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.21 no.7
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    • pp.1401-1410
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    • 2017
  • Cryptographic synchronization which synchronizes internal state of cryptographic algorithm and ciphertext stream between an encryptor and a decryptor affects the quality of secure communication. If there happens a synchronization loss between a transmitter and a receiver in a secure communication, the output of the receiver is unintelligible until resynchronization is made. Especially, in the secure communication on a wireless channel with high BER, synchronization performance can dominate its quality. In this paper, we proposed a novel and noise robust synchronization signal generation method as well as its detection algorithm. We generated a synchronization signal in the form of a masking structure based on the maximal length sequence, and developed a detection algorithm using a correlation property of the maximal length sequence. Experimental results have demonstrated that the proposed synchronization signal outperforms the conventional concatenated type synchronization signal in a noisy environment.

HIGH-SPEED SOFTWARE FRAME SYNCHRONIZER USING SSE2 TECHNOLOGY

  • Koo, In-Hoi;Ahn, Sang-Il;Kim, Tae-Hoon;Sakong, Young-Ho
    • Proceedings of the KSRS Conference
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    • 2007.10a
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    • pp.522-525
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    • 2007
  • Frame Synchronization is applied to not only digital data transmission for data synchronization between transmitter and receiver but also data communication with satellite. When satellite image data with high resolution and mass storage is transmitted, hardware frame synchronizer for real-time processing or software frame synchronizer for post-processing is used. In case of hardware, processing with high speed is available but data loss may happen for Search of Frame Synchronization. In case of software, data loss does not happen but speed is relatively slow. In this paper, Pending Buffer concept was proposed to cope with data loss according to processing status of Frame Synchronization. Algorithm to process Frame synchronization with high speed using bit threshold search algorithm with pattern search technique and SIMD is also proposed.

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Modified BECM(M-BECM) algorithm for all-digital high speed symbol synchronization (고속 all-digital 심볼동기 위한 modified-BECM(M-BECM) 알고리즘)

  • 이경하;김용훈;최형진
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.33A no.7
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    • pp.34-43
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    • 1996
  • In this paper a simpel algorithm for all-digial high speed symbol synchronization is proposed. The proposed algorithm has a structure based on BECM (band-edge component maximization). The algorithm requires only tow samples per symbol for its operation. We analyze and evaluate performance of the proposed algorithm. Simulation results reveal that the proposed algorithm has better performance than the gardner algorithm in narrowband.

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