• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.16 no.4
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• pp.292-297
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• 2003

We fabricated a single crystal silicon thin film transistor for active matrix organic light emitting displays(AMOLEDs) using silicon on insulator wafer (SOI wafer). Poly crystal silicon thin film transistor(poly-Si TFT) Is actively researched and developed nowsdays for a pixel switching devices of AMOLEDs. However, poly-Si TFT has some disadvantages such as high off-state leakage currents and low field-effect mobility due to a trap of grain boundary in active channel. While single crystal silicon TFT has many advantages such as high field effect mobility, low off-state leakage currents, low power consumption because of the low threshold voltage and simultaneous integration of driving ICs on a substrate. In our experiment, we compared the property of poly-Si TFT with that of SOI TFT. Poly-Si TFT exhibited a field effect mobility of 34 $\textrm{cm}^2$/Vs, an off-state leakage current of about l${\times}$10$\^$-9/ A at the gate voltage of 10 V, a subthreshold slope of 0.5 V/dec and on/off ratio of 10$\^$-4/, a threshold voltage of 7.8 V. Otherwise, single crystal silicon TFT on SOI wafer exhibited a field effect mobility of 750 $\textrm{cm}^2$/Vs, an off-state leakage current of about 1${\times}$10$\^$-10/ A at the gate voltage of 10 V, a subthreshold slope of 0.59 V/dec and on/off ratio of 10$\^$7/, a threshold voltage of 6.75 V. So, we observed that the properties of single crystal silicon TFT using SOI wafer are better than those of Poly Si TFT. For the pixel driver in AMOLEDs, the best suitable pixel driver is single crystal silicon TFT using SOI wafer.

• 한국신재생에너지학회:학술대회논문집
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• 2010.06a
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• pp.96.2-96.2
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• 2010

The surface morphology and structural properties of polycrystalline silicon (poly-Si) films made in-situ aluminum induced crystallization at various substrate temperature (300~600) was investigated. Silicon films were deposited by hot-wire chemical vapor deposition (HWCVD), as the catalytic or pyrolytic decomposition of precursor gases SiH4 occurs only on the surface of the heated wire. Aluminum films were deposited by DC magnetron sputtering at room temperature. continuous poly-Si films were achieved at low temperature. from cross-section TEM analyses, It was confirmed that poly-Si above $450^{\circ}C$ was successfully grown on and poly-Si films had (111) preferred orientation. As substrate temperature increases, Si(111)/Si(220) ratio was decreased. The electrical properties of poly-Si film were investigated by Hall effect measurement. Poly-Si film was p-type by Al and resistivity and hall effect mobility was affected by substrate temperature.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.34D no.1
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• pp.35-40
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• 1997

A new method to form the gate oxide and recrystllize the polycrystalline silicon (poly-Si) active layer simultaneously is proposed and fabricated successfully. During te irradiation of excimer laser, the poly-Si film is recrystallized, while the oxygen ion impurities injected into the amorphous silicon(a-Si) film are activated by laser energy and react with silicon atoms to form SiO2. We investigated the characteristics of the sample fabricated by proposed method using AES, TEM, AFM. The electrical performance of oxide was verified by ramp up voltage method. Our experimental results show that a high quality oxide, a pol-Si film with fine grain, and a smooth and clean interface between oxide and poly-Si film have been successfully obtained by the proposed fabrication method. The interface roughness of oxide/poly-Si fabricated by new method is superior to film by conventional fabrication os that the proposed method may improve the performance of poly-Si TFTs.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.6 no.3
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• pp.261-264
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• 2005

The 90 nm gate pattern technology have been virtualized by employing the hard mask and the planarization of fate poly silicon. We fabricated 70nm poly-Si on $200 nm-SiO_2/p-Si(100)$ substrates using low pressure chemical vapor deposition (LPCVD) to investigate roughness evolution by varying rapid annealing temperatures. The samples were annealed at the temperatures of $700^{\circ}C\~1100^{\circ}C$ for 40 seconds with a rapid thermal annealer. The surface image and the surface roughness were measured by a field emission scanning electron microscopy (FESEM) and an atomic force microscopy (AFM), respectively. The poly silicon surface became more rough as temperature increased due to surface agglomeration. The optimum conditions of poly silicon planarization were achieved by annealed at $700^{\circ}C$ for 40 seconds.

• Electrical & Electronic Materials
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• v.10 no.8
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• pp.794-799
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• 1997

Poly-Si films have been prepared by solid phase crystallization of LPCVD(low-pressure CVD) amorphous silicon. The crystallinity of poly-Si films has been derived from UV reflectance spectrum and lies in the range between 70% and 80% . From XRD measurement the peak at 28.2$^{\circ}$from (111) plane is dominantly detected in the SPC poly-Si films, The average grain size of poly-Si film is determined by the image of SEM and varies from 4000 $\AA$ to 8000$\AA$. The electrical conductivity of as-deposited amorphous silicon film is about 2.5$\times$10$^{-7}$ ($\Omega$.cm)$^{-1}$ , and 3~4$\times$10$^{-6}$ ($\Omega$.cm)$^{-1}$ of room temperature conductivity is the SPC poly-Si films. The conductivity activation energies are 0.5~0.6 eV or the 500$\AA$-thick poly-Si films.

• Journal of the Korean Physical Society
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• v.73 no.9
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• pp.1329-1333
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• 2018

We investigated the mechanism of mobility enhancement after the dehydrogenation process in polycrystalline silicon (poly-Si) thin films. The dehydrogenation process was performed by using an in-situ CVD chamber in a $N_2$ ambient or an ex-situ furnace in air ambient. We observed that the dehydrogenated poly-Si in a $N_2$ ambient had a lower oxygen concentration than the dehydrogenated poly-Si annealed in an air ambient. The in-situ dehydrogenation increased the (111) preferred orientation of poly-Si and reduced the oxygen concentration in poly-Si thin films, leading to a reduction of the trap density near the valence band. This phenomenon gave rise to an increase of the field-effect mobility of the poly-Si thin film transistor.

• Journal of the Korean institute of surface engineering
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• v.47 no.6
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• pp.354-361
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• 2014

In order to utilize silicon carbide (SiC) as an inner part of fluidized bed reactor (FBR) for manufacturing poly-silicon, we have carried out the thermodynamic calculation on the overall reactions including poly-silicon synthesis and compatibility of SiC with FBR process. The resources of silicon included $SiH_4(MS)$, $SiHCl_3(TCS)$ and $SiCl_4(STC)$ and the thermodynamic yield of the FBR with MS, TCS and STC were compared each other with variable range of temperature, pressure and hydrogen to silicon ratio. The silicon yield of MS, TCS and STC were 100%, 28% and 4%, respectively, throughout the conventional FBR conditions. Silicon carbide having high hardness and strength showed strong resistance to granule collisions during the FBR process using a lab-scale reactor. And it also showed quite good compatibility with the typical FBR processes of MS and TCS resources.

• Journal of the Korean institute of surface engineering
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• v.47 no.1
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• pp.20-24
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• 2014

Joule heat is generated by applying an electric filed to a conductive layer located beneath or above the amorphous silicon film, and is used to raise the temperature of the silicon film to crystallization temperature. An electric field was applied to an indium tin oxide (ITO) conductive layer to induce Joule heating in order to carry out the crystallization of amorphous silicon. Polycrystalline silicon was produced within the range of a millisecond. To investigate the kinetics of Joule-heating induced crystallization (JIC) solid phase crystallization was conducted using amorphous silicon films deposited by plasma enhanced chemical vapor deposition and using tube furnace in nitrogen ambient. Microscopic and macroscopic uniformity of crystallinity of JIC poly-Si was measured to have better uniformity compared to that of poly-Si produced by other methods such as metal induced crystallization and Excimer laser crystallization.

• JSTS:Journal of Semiconductor Technology and Science
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• v.1 no.1
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• pp.31-39
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• 2001

W polymetal gate technology for giga bit DRAM are presented. Key module processes for polymetal gate are studied in detail. $W/WN_x/poly-silicon$ adopted for a word line of 256Mbit DRAM has good gate oxide integrity and junction leakage characteristics through full integration, which is comparable to those of conventional $WSi_x$/Poly-silicon gate process. These results undoubtedly show that $W/WN_x/poly-silicon$ is the strongest candidate as a word line for Giga bit DRAM.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.722-726
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• 2003

본 논문에서는 Porous poly-silicon cold cathode에 의해 전자를 방출하는 Ballistic electron surface-emitting display(BSD)의 전계방출 특성을 실험했다. BSD는 nanocrystalline을 둘러싼 산화막을 multi-tunneling한 전자에 의해 발광이 되는 mechanism이기 때문에 산화막의 두께를 변수로 두어 특성을 실험했다. 900℃에서 1시간에서 3시간까지 30분 간격으로산화 반응을 진행하였으며, leakage current와 emission current의 비로 효율을 나타내었을 때 1시간 30분 동안 산화 반응을 한 시료가 가장 좋은 특성을 나타내었다.