• Title/Summary/Keyword: n type Si

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Process and Structure Design for High Power Reverse-Conducting Gate Commutated Thyristors (RC- GCTs) (고전압 역도통 Gate Commutated Thyristor (RC-GCT) 소자의 공정 및 구조 설계)

  • Kim, Sang-Cheol;Kim, Eun-Dong;Zhang, Chang-Li;Kim, Nam-Kyun;Baek, Do-Hyun
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.07a
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    • pp.1096-1099
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    • 2001
  • The basic design structure of RC-GCTs (Reserve-Conducting Gate-Commutated Thyristors) is firstly given in this paper. The bulk of wafer is punch-through (PT) type with high resistivity and narrow N-base width. The photo-mask was designed upon the turn-off characteristics of GCT and solution of separation between GCT and diode part. The center part of Si wafer is free-wheeling diode (FWD) and outer is GCT part which has 240 fingers totally. The switching performance of GCT was investigated by Dessis of ISE. The basic manufacture process of 2500V-4500V RC-GCTs was given in this work. Additionally, the local carrier lifetime control by 5Mev proton irradiation was adopted so as to not only to have the softness of reverse recovering for FWD but for reduction of turn-off losses of GCT as well.

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Etching Method of Thin Film on the Backside of Wafer Using Single Wafer Processing Tool (매엽식 방법을 이용한 웨이퍼 후면의 박막 식각)

  • Ahn, Young-Ki;Kim, Hyun-Jong;Koo, Kyo-Woog;Cho, Jung-Keun
    • Journal of the Semiconductor & Display Technology
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    • v.5 no.2 s.15
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    • pp.47-49
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    • 2006
  • Various methods of making thin film is being used in semiconductor manufacturing process. The most common method in this field includes CVD(Chemical Vapor Deposition) and PVD(Physical Vapor Deposition). Thin film is deposited on both the backside and the frontside of wafers. The thin film deposited on the backside has poor thickness profile, and can contaminate wafers in the following processes. If wafers with the thin film remaining on the backside are immersed in batch type process tank, the thin film fall apart from the backside and contaminate the nearest wafer. Thus, it is necessary to etch the backside of the wafer selectively without etching the frontside, and chemical injection nozzle positioned under the wafer can perform the backside etching. In this study, the backside chemical injection nozzle with optimized chemical injection profile is built for single wafer tool. The evaluation of this nozzle, performed on $Si_3N_4$ layer deposited on the backside of the wafer, shows the etching rate uniformity of less than 5% at the etching rate of more than $1000{\AA}$.

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Temperature Dependence of the $SrTiO_3$ Capacitor Thin Films Deposited by RF Magnetron Sputtering (고주파 마그네트론 스퍼터링에 의한 $SrTiO_3$ 캐패시터 박막의 온도 의존성)

  • Oh, Gum-Kon;Lee, Woo-Sun;Kim, Nam-Oh;Kim, Jai-Min;Lee, Byung-Sung;Kim, Sang-Yong
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.48 no.6
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    • pp.429-435
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    • 1999
  • The $SrTiO_3$ thin films were prepared on Ag/TiN-coated and p-type bare Si(100) substrates by r.f. magnetron sputtering deposition technique. The electrical properties of the deposited films were investigated, which controlling deposition parameters such as substrate temperature and film thickness. The electrical properties ofthe $SrTiO_3$ films were measured using the capacitance-voltage(C-V) technique. The thickness dependence of the electrical properties of the $SrTiO_3$ films was analyzed of the connection with the films in series. The substrate affected the crystal structure and texture characteristics of the $SrTiO_3$ films. The resistivity of the film, sandwiched between Al and Ag films was measured, as a function of the temperature.

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Preliminary Study on the Elemental Quantification of in Ambient Liquid Samples of Microliter Volume Using the In-air Micro-PIXE Technique

  • Ma, Chang-Jin;Lim, Cheol-Soo;Sakai, Takuro
    • Asian Journal of Atmospheric Environment
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    • v.11 no.1
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    • pp.54-60
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    • 2017
  • Quantifying the trace elements in infinitesimal ambient liquid samples (e.g., single raindrop, cloud/fog water, and the soluble fraction extracted from the particles collected for a short time) is an important task for understanding formation processes, heating/cooling rates, and their health hazards. The purpose of this study is to employ an in-air micro PIXE system for quantitative analysis of the trace elements in a thimbleful of reference liquid sample. The bag type liquid sample holder originally designed with $10{\mu}m$ thick $Mylar^{(R)}$ film retained the original shape without any film perforation and apparent peaks of film blank by the end of the analysis. As one of tasks to be solved, the homogeneity of the elemental distribution in liquid reference species was verified by the X-ray line profiles for several references. It was possible to resolve the significant peaks for whole target elements corresponding to the channel number of micro-PIXE spectrum. The calibration curves for the six target elements (Si, S, Cl, Fe, Ni, and Zn) in standard solutions were successfully plotted by concentration (ppm) and ROI of interest net counts/dose (nC).

Fabrication of high-quality silicon wafers by gettering process (Gettering을 이용한 태양전지용 고품위 실리콘 기판 제작)

  • Park, Hyo-Min;Tark, Sung-Ju;Kang, Min-Gu;Park, Sung-Eun;Lee, Seung-Hun;Kim, Dong-Whan
    • 한국신재생에너지학회:학술대회논문집
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    • 2009.11a
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    • pp.366-366
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    • 2009
  • 후면접합 태양전지는 상용 태양전지의 수평전류 손실(lateral current loss) 이 없으며, 전면전극에 의해 발생하는 그림자 손실(shading loss) 줄인 고효율 태양전지의 하나이다. 생성된 반송자가 후면에 위치한 전극에서 수집되기 때문에 효율향상을 위해서는 불순물에 의한 재결합을 줄이는 것이 중요하다. 따라서 Gettering 은 높은 소수반송자 수명(life-time)을 가지는 고품위 실리콘 기판은 고효율 실리콘태양전지 제작을 위한 중요 요소 기술이다. 본 연구에서는 n-type c-Si 기판을 이용한 고효율 실리콘 이종접합 태양전지제작을 위해 external gettering 공정을 이용하여 고품위 실리콘 기판을 제작하였다. POC13 doping process 의 온도, 시간을 변화시킴으로써 이에 따른 변화를 관찰하였다. 주사전자현미경(SEM)를 통해 etch pit 을 확인 했으며,Four point probe 를 통해 면저항을 측정, 인(P)의 농도를 계산 하였다. 계산된 면저항을 통해 인(P)의 확산 깊이를 계산하였다. Iodine passivation 된 시편을 Qusi-steady state photoconductance (QSSPC)를 이용하여 소수반송자 수명을 측정함으로써 gettering 에 의한 bulk lifetime 향상 효과를 관찰하였다.

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A study on the grinding machining of engineering ceramics with high efficiency using "In-process dressing" (연속 드레싱 공정을 도입한 엔지니어링 세라믹스의 고능률적 연삭 가공에 관한 연구)

  • 강재훈;이재경
    • Journal of the korean Society of Automotive Engineers
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    • v.15 no.2
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    • pp.130-143
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    • 1993
  • Engineering ceramics have some excellent properties as the material for the mechanical components. It is, however, very difficult to grind ceramics with high efficiency because of their high strength, hardness and brittleness. In this paper, experiments are carried out to obtain the effect of "In-process dressing" to grind the Engineering ceramics with high efficiency. To save running time for dressing process and obtain restraint effect of diamond grain wear, "In-process dressing" system using WA stick type honing stone is proposed. Representative Engineering ceramics, such as AI$_{2}$O$_{3}$, Si$_{3}$N$_{4}$, are ground with diamond wheel. Also bending strength test is carried out to check upward tendancy of mecahnical properties as the result of machining defact restraint through the grinding machining method using "In-process dressing" process. Some results obtained in this study provide useful information to attain the high efficiency grinding and the high mechanical properties of Engineering ceramics.rties of Engineering ceramics.

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High Crystalline Epitaxial Bi2Se3 Film on Metal and Semiconductor Substrates

  • Jeon, Jeong-Heum;Jang, Won-Jun;Yun, Jong-Geon;Gang, Se-Jong
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.08a
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    • pp.302-302
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    • 2011
  • The binary chalcogenide semiconductor Bi2Se3 is at the center of intensive research on a new state of matter known as topological insulators. It has Dirac point in their band structures with robust surface states that are protected against external perturbations by strong spin-orbit coupling with broken inversion symmetry. Such unique band configurations were confirmed by recent angle-resolved photoelectron emission spectroscopy experiments with an unwanted n-type doping effect, showing a Fermi level shift of about 0.3 eV caused by atomic defects such as Se vacancies. Since the number of defects can be reduced using the molecular beam epitaxy (MBE) method. We have prepared the Bi2Se3 film on noble metal Au(111) and semiconductor Si(111) substrates by MBE method. To characterize the film, we have introduced several surface sensitive techniques including x-ray photoemission electron spectroscopy (XPS) and micro Raman spectroscopy. Also, crystallinity of the film has been confirmed by x-ray diffraction (XRD). Using home-built scanning tunneling microscope, we observed the atomic structure of quintuple layered Bi2Se3 film on Au(111).

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전자빔 조사에 따른 Flexible ITO Film의 특성 향상에 대한 연구

  • Hwang, Jin-Ye;Nam, Sang-Hun;Kim, Yong-Hwan;Song, Gi-Mun
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.02a
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    • pp.581-581
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    • 2013
  • ITO (Indium Tin oxide)는 비화학 양론적 조성을 띄는 n-type 반도체 특성이 있으며 가시광 영역(380~780 nm)의 파장에 대한 높은 광 투과도(>85%)를 가지며 비교적 높은 전도도(${\sim}10^4/{\Omega}-cm$)를 갖고 화학적 안정성이 우수하여 투명전극 박막으로 많이 사용되어왔다. 또한, PET film은 전기절연성, 내후성이 우수하고, 85%의 투과율을 보이는 특성에 의하여 Flexible display의 기판으로 많은 연구가 진행되고 있다. 이와 같은 PET film에 ITO를 증착하여 광 투과도와 전기전도도가 우수한 Flexible display의 투명전극으로 많은 연구 개발이 이루어지고 있다. Flexible ITO 박막의 특성을 향상하기 위해서는 $200^{\circ}C$ 이상의 열처리 공정이 필요하지만, PET는 약 $200^{\circ}C$ 이상에서 열 변형이 일어나므로 열처리 공정이 어렵고 이러한 문제점을 해결하기 위해 ITO/PET film에서 PET film의 변형 없이 ITO 박막의 표면에 전자빔 형태로 조사하여 박막의 물성을 개선하는 연구가 진행되고 있다 [1]. 본 연구에서는 ITO/$SiO_2$가 증착된 PET film에 전자빔을 조사하여 ITO 박막의 물성 변화를 관찰하였고, 전자빔 에너지 변화 및 전자빔 조사 시간에 따라 ITO film의 전기적, 광학적 특성 변화를 분석하였다. 구조적 특성은 XRD (X-ray diffraction), 전기적 특성은 4-point probe, Hall measurement를 이용하였으며, 가시광영역의 광 투과도는 UV-Vis spectrometer로 측정하였다. 전기 광학적 특성 변화는 Figure of Merit (FOM) 수치로 분석하였다. 이 실험으로 PET film에 직접적인 열을 가하지 않으면서 ITO 박막의 표면에 전자빔을 조사 하여, 박막의 전기전도도 및 광 투과율, 결정성 향상 등을 관찰할 수 있었다.

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Fabrication and Characterization of FET Device Using ZnO Nanowires (ZnO 나노와이어를 이용한 FET 소자 제작 및 특성 평가)

  • Kim, K.W.;Oh, W.S.;Jang, G.E.;Park, D.W.;Lee, J.O.;Kim, B.S.
    • Journal of the Korean institute of surface engineering
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    • v.41 no.1
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    • pp.12-15
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    • 2008
  • The zinc oxide(ZnO) nanowires were deposited on Si(001) substrates by thermal chemical vapour deposition without any catalysts. SEM data suggested that the grown nanostructures were the well-aligned ZnO single crystals with preferential orientation. Back-gate ZnO nanowire field effect transistors(FET) were successfully fabricated using a photolithography process. The fabricated nanowire FET exhibits good contact between the ZnO nonowire and Au metal electrodes. Based on I-V characteristics it was found out that the ZnO nanowire revealed a characteristic of n-type field effect transistor. The drain current increases with increasing drain voltage, and the slopes of the $I_{ds}-V_{ds}$ curves are dependent on the gate voltage.

A Study of Data Storage Device Utilizing AFM technology (AFM을 이용한 데이터 저장 소자 연구)

  • Choi Jung-Hwan;Park Kun-Hyung
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.19 no.5
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    • pp.411-416
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    • 2006
  • A new reading technology for the ultra-high density data storage device utilizing AFM technology was proposed and its experimental results were discussed in this paper. For the experiments, an about $2{\mu}m$ thick conductive polymer layer was spin-coated on the heavily doped n-type Si wafer and an about $0.1{\mu}m$ thick PMMA layer was also been spin-coated on it. After then, the $5{\times}5$ memory way was fabricated by making indents on the surface of the wafer with the heated AFM tip, and the data reading was performed by scanning the surface with the tip biased at 10 V and the measuring the current flowing out at the end of the tip. The experimental results clearly showed that the new data reading technology worked superbly. The current measured was about 0.92 pA at the cell with the indent, and it was not only below 0.31 pA at the cell without the indent, but also at the cell where the indent was erased.