• 한국ITS학회:학술대회논문집
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• 2008.11a
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• pp.169-172
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• 2008

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.851-854
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• 1999

A high efficient, CMOS RF power amplifier at a 2.SV power supply for the band of 902-928MHz was designed and analyzed in 0.25${\mu}{\textrm}{m}$ standard CMOS technology. The output power of designed amplifier is being digitally controlled from a minimum of 2㎽ to a maximum of 21㎽, corresponding to a dynamic range of l0㏈ power control. The frequency response of this power amplifier is centered roughly at 915MHz. The power added efficiency of designed amplifer is almost 48% at maximum output power of 21㎽.

• Journal of IKEEE
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• v.25 no.1
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• pp.133-138
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• 2021

We propose a Ku-band three-stack CMOS power amplifier to enhance the output power and efficiency. To minimize the dc power consumption, the driver stage is designed using common-source structure. To obtain high output power and utilize a voltage combining method, the power stage is designed using stack structure. To verify the proposed power amplifier structure, we design a Ku-band power amplifier using 65-nm RFCMOS process which provide nine metal layers. The P1dB, power-added efficiency, and gain are higher than 20 dBm, 23 dB, and 25%, respectively, while the operating frequency is 14 GHz-16 GHz.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.47 no.2
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• pp.56-61
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• 2010

In this paper, high efficient power amplifier with dual band has been realized. Dual band power amplifier have used modify stub matching for single FET, center frequency 2.14GHz and 5.2GHz respectively. The dual-band operation of the CRLH TL is achieved by the frequency offset and the nonlinear phase slope of the CRLH TL for the matching network of the power amplifier. Because the control of the all harmonic components is very difficult m dual-band, we have managed only the second- and third-harmonics to obtain the high efficiency with the CRLH TL in dual-band. Dual-band characteristics in the output has to balance. Two operating frequencies are chosen at 2.14 GHz and 5.2 GHz in this work. The measured results show that the output power of 28.56 dBm and 29 dBm was obtained at 2.14 GHz and 5.2 GHz, respectively. At this point, we have obtained the power-added efficiency (PAE) of 65.824 % and 69.86 % at two operation frequencies, respectively.

• Journal of The Institute of Information and Telecommunication Facilities Engineering
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• v.8 no.1
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• pp.12-17
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• 2009

In this paper, We play it for the purpose of study about the power amplifier which applied DGS and adaptive bias circuit structure to general Doherty amplifier for the efficiency of a RF power amplifier and a linearity improvement in the WiBro band. As for the IMD3, 3.4dBc was improved with -26.3dBc when we did the measurement result existing Doherty power amplifier and comparison of the Doherty power amplifier which applied an adaptive bias circuit and the DGS which proposed in this paper, and the mean power efficiency verified what was increased in 37%. Also, we were able to know PAE of 36.6% with output power 34.0dBm in P1dB when magnitude of an input signal was 25.6dBm. we did 6dB back off in output P1dB in order to confirm the ACPR which was a nonlinear characteristic and measured the ACPR. we showed the -34.55dBc which was a value of -34.5dBc or below in the 4.77MHz off-set that was a transmission standard. Therefore, we were able to know that we were satisfied with a spectrum mask standard.

• Journal of information and communication convergence engineering
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• v.1 no.1
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• pp.39-43
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• 2003

The technology required to advance the state of the art of ultra-high-intensity excimer amplifier construction to the 100 J/100fs output pulse level is identified. The preliminary design work for very large final amplifier pumped by electron beam module is described, and key design problems and approaches are presented and discussed in detail based on the recent experimental and theoretical results.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.11
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• pp.89-94
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• 2007

For successful implementation of multi-standard transmitter, reconfigurable architecture and component design are essential. This paper presents a reconfigurable CMOS power amplifier designed CMOS 0.25 um process. Designed power amplifier can be operated at 0.9, 1.2, 1.75, and 1.85 GHz. Also, it can be used at 2.4 GHz by using bonding wire inductor. The interstage matching network is composed of two inductors and four switches, and operation frequency can be varied by controlling switches. Proposed power amplifier can be used as a power amplifier in low power applications such as ZigBee or Bluetooth application and used as a driver amplifier in high power application such as CDMA application. Designed power amplifier has 18.2 dB gain and 10.3 dBm output power at 0.9 GHz. Also, it represented 10.3 (18.1) dB gain and 5.2 (10) dBm output power at 1.75 (2.4) GHz.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.8B
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• pp.1464-1471
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• 1999

A wide-band high power amplifier to use for radiated electromagnetic field immunity testing of EMS(Electromagnetic Susceptibility) standards has to meet IEC1000-4-3 specification in the frequency bandwidth of 80MHz to 1000MHz. The power amplifier to be described in this paper consists of driving and power stages with wide-band matched circuits by estimated impedances. The mismatching protection circuit is inserted in it to prevent from damage of power device when the output port of power amplifier is opened or shorted by user's mistake. The characteristics of the power amplifier are obtained output power over 100watts, gain over 40dB and flatness of $\pm$0.3dB in the frequency range of 80 ~300MHz. The harmonics suppression characteristics is measured over 20dBc. This wide-band high power amplifier can be useful fur radiated electromagnetic field immunity testing of IEC 1000-4-3 standard.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.25 no.3
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• pp.376-379
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• 2014

In this paper, we designed more improving a dual-band power amplifier than the transceiver of RFID reader that operates at 910 MHz and 2.45 GHz. A dual-band power amplifier has two circuits. One matching circuit is composed lumped element in the band of 910 MHz. The other matching circuit using distributed element in the high band of 2.45 GHz. So, this dual-band power amplifier works as Band Rejection Filter in the band of 910 MHz but in the high band of 2.45 GHz works as Band Pass Filter. Therefore, this is composed a microstrip transmission line. A power amplifier is showed gains of 8 dB output power at 910 MHz and 1.5 dB output power at 2.45 GHz. If input power is 10 dBm, both of bands output 20 dBm.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.17 no.8 s.111
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• pp.707-712
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• 2006

In this paper, dual bias control circuit and PBG(Photonic BandGap) structure have been employed to improve PAE(Power Added Effciency) of the Doherty amplifier on Input power level. The gate and drain bias voltage has been controlled with the envelope of the input RF signal and PBG structure has been employed on the output port of Doherty amplifier. The proposed Doherty amplifier using dual bias controlled circuit and PBG has been improved the average PAE by 8%, $IMD_3$ by -5 dBc. And proposed Doherty amplifier has a high efficiency more than 30% on overall input power level, respectively.