• Transactions on Electrical and Electronic Materials
• /
• v.17 no.1
• /
• pp.50-55
• /
• 2016

In this paper, we have analyzed the electrical characteristics of 1200V trench gate field stop IGBT and have compared to NPT planar type IGBT and NPT planar field stop IGBT. As a result of analyzing, we obtained superior electrical characteristics of trench gate field stop IGBT than conventional IGBT. To begin with, the breakdown voltage characteristic was showed 1,460 V and on state voltage drop was showed 0.7 V. We obtained 3.5 V threshold voltage, too. To use these results, we have extracted optimal design and process parameter and designed trench gate field stop IGBT. The designed trench gate IGBT will use to inverter of renewable energy and automotive industry.

• Journal of IKEEE
• /
• v.17 no.3
• /
• pp.365-370
• /
• 2013

Power MOSFET is developed in power savings, high efficiency, small size, high reliability, fast switching, and low noise. Power MOSFET can be used in high-speed switching transistors devices. Recently attention given to the motor and the application of various technologies. Power MOSFET is a voltage-driven approach switching device and designed to handle on large power, power supplies, converters, motor controllers. In this paper, the 400 V Planar type, and the trench type for realization of low on-resistance are designed. Trench Gate Power MOSFET Vth : 3.25 V BV : 484 V Ron : 0.0395 Ohm has been optimized.

• Proceedings of the Materials Research Society of Korea Conference
• /
• 1996.05a
• /
• pp.64-64
• /
• 1996

• KIEE International Transactions on Electrophysics and Applications
• /
• v.3C no.1
• /
• pp.28-32
• /
• 2003

In this paper, we have studied the in-situ end point detection (EPD) for direct chemical mechanical polishing (CMP) of shallow trench isolation (STI) structures without the reverse moat etch process. In this case, we applied a high selectivity $1n (HSS) that improves the silicon oxide removal rate and maximizes oxide to nitride selectivity Quite reproducible EPD results were obtained, and the wafer-to-wafer thickness variation was significantly reduced compared with the conventional predetermined polishing time method without EPD. Therefore, it is possible to achieve a global planarization without the complicated reverse moat etch process. As a result, the STI-CMP process can be simplified and improved using the new EPD method.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2004.07a
• /
• pp.421-424
• /
• 2004

As the deep sub-micron devices are recently integrated high package density, novel process method for sub $0.1{\mu}m$ devices is required to get the superior thin gate oxide characteristics and reliability. However, few have reported on the electrical quality and reliability on the thin gate oxide. In this paper I will recommand a novel shallow trench isolation structure for thin gate oxide $30{\AA}$ of deep sub-micron devices. Different from using normal LOCOS technology, novel shallow trench isolation have a unique 'inverse narrow channel effects' when the channel width of the devices is scaled down shallow trench isolation has less encroachment into the active device area. Based on the research, I could confirm the successful fabrication of shallow trench isolation(STI) structure by the SEM, in addition to thermally stable silicide process was achiever. I also obtained the decrease threshold voltage value of the channel edge and the contact resistance of $13.2[\Omega/cont.]$ at $0.3{\times}0.3{\mu}m^2$. The reliability was measured from dielectric breakdown time, shallow trench isolation structure had tile stable value of $25[%]{\sim}90[%]$ more than 55[sec].

• Journal of Advanced Navigation Technology
• /
• v.18 no.4
• /
• pp.364-370
• /
• 2014

In this paper, high reliable trench formation technique and a novel fabrication techniques for trench gate MOSFET is proposed which is a key to expend application of power MOSFET in the future. Trench structure has been employed device to improve Ron characteristics by shrinkage cell pitch size in DMOSFET and to isolate power device part from another CMOS device part in some power integrated circuit. A new process method for fabricating very high density trench MOSFETs using mask layers with oxide spacers and self-align technique is realized. This technique reduces the process steps, trench width and source and p=body region with a resulting increase in cell density and current driving capability and decrease in on resistance.

• Journal of the Korean institute of surface engineering
• /
• v.31 no.5
• /
• pp.237-244
• /
• 1998

In this stydy, submicron shallow trenches applied to STI(shallow tench isolation) were etched using inductively coupled $CI_2$/HBr and $CI_2/N_2$plasmas and the physical and electrical defects remaining on the etched silicon trench surfaces and the effects of various annealing and oxidation on the removal of the defects were studied. Using high resolution electron microscopy(HRTEM), Physical defects were investigated on the silicon trench surfaces etched in both 90%$CI_2$/ 10%$N_2$ and 50%$CI_2$/50%HBr. Among the areas in the tench such as trench bottom, bottom edge, and sidewall, the most dense defects were found near the trench bottom edge, and the least dense defects were found near the trench bottom edge, and least dense defects compared to that etched with ment as well as hydrogen permeation. Thermal oxidation of 200$\AA$ atthe temperature up to $1100^{\circ}C$apprars not to remove the defects formed on the etched silicon trenches for both of the etch conditions. To remove the physicall defects, an annealing treatment at the temperature high than $1000^{\circ}C$ in N for30minutes was required. Electrical defects measured using a capacitance-voltage technique showed the reduction of the defects with increasing annealing temperature, and the trends were similar to the results on the physical defects obtained using transmission electron microscopy.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.36 no.4
• /
• pp.385-390
• /
• 2023

In this paper, the 1,700 V level SiC-based power MOSFET device widely used in electric vehicles and new energy industries was designed, that is, a single trench gate power MOSFET structure and a double trench gate power MOSFET structure were proposed to analyze electrical characteristics while changing the design and process parameters. As a result of comparing and analyzing the two structures, it can be seen that the double trench gate structure shows quite excellent characteristics according to the concentration of the drift layer, and the breakdown voltage characteristics according to the depth of the drift layer also show excellent characteristics of 200 V or more. Among them, the trench gate power MOSFET device can be applied not only to the 1,700 V class but also to a voltage range above it, and it is believed that it can replace all Si devices currently applied to electric vehicles and new energy industries.

• Journal of the Korean Vacuum Society
• /
• v.11 no.4
• /
• pp.235-239
• /
• 2002

A new method for deep trench isolation using selective growth of polycrystalline silicon is proposed. In this method, trench filling is performed by forming polysilicon-inner sidewalls within the trench, and then selectively growing them by reduced chemical vapor deposition using $SiH_2C1_2$gas at $1100^{\circ}C$. The surface profiles of filled trenches are determined mainly by the initial depth of inner sidewalls and the total thickness of selective growth. No chemical mechanical polishing(CMP) process is needed in this new method, which makes the process flow simpler and more reliable in comparison with the conventional method using CMP process.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.33 no.2
• /
• pp.105-108
• /
• 2020

In this study, experiments and simulations were conducted for a 1,200-V-class trench Si insulated-gate bipolar transistor (IGBT) with a small cell pitch below 2.5 ㎛. Presently, as a power device, the 1,200-V-class trench Si IGBT is used for automotives including electric vehicles, hybrid electric vehicles, and industrial motors. We obtained a breakdown voltage of 1,440 V, threshold of 6 V, and state voltage drop of 1.75 V. This device is superior to conventional IGBTs featuring a planar gate. To derive its electrical characteristics, we extracted design and process parameters. The cell pitch was 0.95 ㎛ and total wafer thickness was 140 ㎛ with a resistivity of 60 Ω·cm. We will apply these results to achieve fine-pitch gate power devices suitable for electrical automotive industries.