통합 검색 | Korea Science

홍희송;정구락;박종혁;임해용;장영록;강준희;한택상
- Progress in Superconductivity
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- 제5권1호
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- pp.13-16
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- 2003
In this work, we have studied about an RSFQ (Rapid Single Flux Quantum) switch element. The circuit was designed, simulated, and laid out for mask fabrication. The switch cell was composed of a D flip-flop, a splitter, a confluence buffer, and a switch core. The switch core determined if the input data could pass to the output. “On” and o“off” controls in the switch core could be possible by utilizing an RS flip-flop. When a control pulse was input to the “on” port, the RS flip-flop was in the set state and passed the input pulses to the output port. When a pulse was input to the “off” port, the RS flip-flop was in the reset state and prevented the input pulses from transferring to the output port. We simulated and optimized the switch element circuit by using Xic, WRspice, and Julia. The minimum circuit margins in simulations were more than $\pm$20%. We also performed the mask layout of the circuit by using Xic and Lmeter.
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김진영;백승헌;김세훈;강준희
- 한국초전도ㆍ저온공학회논문지
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- 제7권1호
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- pp.9-12
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- 2005
We have constructed an RSFQ 4-bit Arithmetic Logic Unit (ALU) in a pipelined structure. An ALU is a core element of a computer processor that performs arithmetic and logic operation on the operands in computer instruction words. We have simulated the circuit by using Josephson circuit simulation tools. We used simulation tools of XIC, $WRspice^{TM}$, and Julia. To make the circuit work faster, we used a forward clocking scheme. This required a careful design of timing between clock and data pulses in ALU. The RSFQ 1-bit block of ALU used in constructing the 4-bit ALU was consisted of three DC current driven SFQ switches and a half-adder. By commutating output ports of the half adder, we could produce AND, OR, XOR, or ADD functions. The circuit size of the 4-bit ALU when fabricated was 3 mm x 1.5 mm, fitting in a 5 mm x 5mm chip. The fabricated 4-bit ALU operated correctly at 5 GHz clock frequency. The chip was tested at the liquid-helium temperature.
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남두우;정구락;강준희
- 한국초전도ㆍ저온공학회논문지
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- 제4권1호
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- pp.8-12
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- 2002
Since the high performance analog-to-digital converter can be built with Rapid Single Flux Quantum (RSFQ) logic circuits the development of superconductive analog-to-digital converter has attracted a lot of interests as one of the most prospective area of the application of Josephson Junction technology. One of the main advantages in using Rapid Sng1e Flux Quantum logic in the analog-to-digital converter is the low voltage output from the Josephson junction switching, and hence the high resolution. To design an analog-digital converter, first we have used XIC tool to compose a circuit schematic, and then studied the operational principle of the circuit with WRSPICE tool. Through this process, we obtained the proper circuit diagram of an 1-bit analog-digital converter circuit. The optimized circuit was laid out as a mask drawing. Inductance values of the circuit layout were calculated with L-meter.
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강준희
- Progress in Superconductivity
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- 제6권1호
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- pp.7-12
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- 2004
Due to the very fast switching speed of Josephson junctions, superconductive digital circuit has been a very good candidate fur future electronic devices. High-speed and Low-power microprocessor can be developed with Josephson junctions. As a part of an effort to develop superconductive microprocessor, we have designed an RSFQ 4-bit ALU (Arithmetic Logic Unit) in a pipelined structure. To make the circuit work faster, we used a forward clocking scheme. This required a careful design of timing between clock and data pulses in ALU. The RSFQ 1-bit block of ALU used in this work consisted of three DC current driven SFQ switches and a half-adder. We successfully tested the half adder cell at clock frequency up to 20 GHz. The switches were commutating output ports of the half adder to produce AND, OR, XOR, or ADD functions. For a high-speed test, we attached switches at the input ports to control the high-speed input data by low-frequency pattern generators. The output in this measurement was an eye-diagram. Using this setup, 1-bit block of ALU was successfully tested up to 40 GHz. An RSFQ 4-bit ALU was fabricated and tested. The circuit worked at 5 GHz. The circuit size of the 4-bit ALU was 3 mm ${\times}$ 1.5 mm, fitting in a 5 mm ${\times}$ 5 mm chip.
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김진영;백승헌;김세훈;정구락;임해용;박종혁;강준희;한택상
- Progress in Superconductivity
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- 제6권2호
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- pp.104-107
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- 2005
We have developed and tested an RSFQ 4-bit Arithmetic Logic Unit (ALU) based on half adder cells and de switches. ALU is a core element of a computer processor that performs arithmetic and logic operations on the operands in computer instruction words. The designed ALU had limited operation functions of OR, AND, XOR, and ADD. It had a pipeline structure. We have simulated the circuit by using Josephson circuit simulation tools in order to reduce the timing problem, and confirmed the correct operation of the designed ALU. We used simulation tools of $XIC^{TM},\;WRspice^{TM}$, and Julia. The fabricated 4-bit ALU circuit had a size of $\3000{\ cal}um{\times}1500{\cal}$, and the chip size was $5{\cal} mm{\times}5{\cal}mm$. The test speeds were 1000 kHz and 5 GHz. For high-speed test, we used an eye-diagram technique. Our 4-bit ALU operated correctly up to 5 GHz clock frequency. The chip was tested at the liquid-helium temperature.
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