• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.17 no.8
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• pp.799-805
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• 2004

Two dimensional MEDICI simulator is used to study the characteristics of latch-up current of Dual Gate Emitter Switched Thyristor. The simulation is done in terms of the current-voltage characteristics, latch-up current density, ON-voltage drop and electrical property with the variations of p-base impurity concentrations. Compared with the other power devices such as MOS Controlled Cascade Thyristor(MCCT), Conventional Emitter Switched Thyristor(C-EST) and Dual Channel Emitter Switched Thyristor(DC-EST), Dual Gate Emitter Switched Thyristor(DG-EST) shows to have the better electrical characteristics, which is the high latch-up current density and low forward voltage-drop. The proposed DG-EST which has a non-planer p-base structure under the floating $N^+$ emitter indicates to have the better characteristics of latch-up current and breakover voltage.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.18 no.5
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• pp.401-406
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• 2005

Two dimensional MEDICI simulator is used to study the electrical characteristics of Dual Gate Emitter Switched Thyristor. The simulation is done in terms of the current-voltage characteristics with the variations of p-base impurity concentrations and current flow. Compared with the other power devices such as MOS Controlled Cascade Thyristor(MCCT), Conventional Emitter Switched Thyristor(C-EST) and Dual Channel Emitter Switched Thyristor(DC-EST), Dual Gate Emitter Switched Thyristor(DG-EST) shows to have tile better electrical characteristics, which is the high latch-up current density and low forward voltage-drop. The proposed DG-EST which has a non-planer u-base structure under the floating N+ emitter indicates to have the better characteristics of latch-up current and breakover voltage in spite of the same turn-off characteristics.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.05b
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• pp.27-30
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• 2003

In this paper, the new dual trench gate Emitter Switched Thyristor (DTG-EST) is proposed for improving snap-back effect which leads to a lot of serious problems of device applications. And the parasitic thyristor that is inherent in the conventional EST is completely eliminated in this structure, allowing higher maximum controllable current densities for ESTs. The conventional EST exhibits snap-back with the anode voltage and current density 2.73V and $35A/cm^2$, respectively. But the proposed DTG-EST exhibits snap-back with the anode voltage and current density 0.96V and $100A/cm^2$, respectively.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.23 no.3
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• pp.183-189
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• 2010

In this paper, the trench gate emitter switched thyristor(EST) withl trench gate electrode is proposed for improving snap-back effect which leads to a lot of problems in device applications. The parasitic thyristor which is inherent in the conventional EST is completely eliminated in this structure, allowing higher maximum controllable current densities for ESTs. The dual trench gate allows homogenous current distribution in the EST and preserves the unique feature of the gate controlled current saturation of the thyristor current. The characteristics of the 1700 V forward blocking EST obtained from two-dimensional numerical simulations (MEDICI) is described and compared with that of a conventional EST. we carried out layout, design and process of EST devices.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.07a
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• pp.392-395
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• 2003

For the first time, the new dual trench gate Emitter Switched Thyristor is proposed for eliminating snap-back effect which leads to a lot of serious problems of device applications. Also, the parasitic thyristor that is inherent in the conventional EST is completely eliminated in the proposed EST structure, allowing higher maximum controllable current densities for ESTs. Moreover, the new dual trench gate allows homogenous current distribution throughout device and preserves the unique feature of the gate controlled current saturation of the thyristor current. The conventional EST exhibits snap-back with the anode voltage and current density 2.73V and $354/{\S}^2$, respectively. But the proposed EST exhibits snap-back with the anode voltage and current density 0.93V and $58A/{\S}^2$, respectively. Saturation current density of the proposed EST at anode voltage 6.11V is $3797A/{\S}^2$. The characteristics of 700V forward blocking of the proposed EST obtained from two dimensional numerical simulations (MEDICI) is described and compared with that of the conventional EST.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.17 no.3
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• pp.259-266
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• 2004

In this paper. a new two types of EST(Emitter Switched Thyristor) structures are proposed to improve the electrical characteristics including the current saturation capability. Besides, the two dimensional numerical simulations were carried out using MEDICI to verify the validity of the device and examine the electrical characteristics. First, a vortical trench electrode EST device is proposed to improve snap-back effect and its blocking voltage. Second, a dual trench gate EST device is proposed to obtain high voltage current saturation characteristics and high blocking voltage and to eliminate snap-back effect. The two proposed devices have superior electrical characteristics when compared to conventional devices. In the vertical trench electrode EST, the snap-back effect is considerably improved by using the vertical trench gate and cathode electrode and the blocking voltage is one times better than that of the conventional EST. And in the dual trench gate EST, the snap-back effect is completely removed by using the series turn-on and turn-off MOSFET and the blocking voltage is one times better than that of the conventional EST. Especially current saturation capability is three times better than that of the other EST.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.48 no.7
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• pp.530-532
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• 1999

A new lateral device entitled SB-DCEST(segmented p-base dual-channel emitter switched thyristor), which suppresses the snapback is proposed and successfully fabricated. The proposed device effectively suppressed the snapback phenomenon by employing the gigh resistance in self-aligned segmented p-base when compared with the conventional DCEST. The experimental results show that the SB-DCEST has the low forward voltage drop of 4.3 V at anode current of $150 A/cm^2$ with the eliminated snap-back regime, while conventional DCEST exhibits higher forward voltage drop of 5.3 V.

• Proceedings of the KIEE Conference
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• 2005.11a
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• pp.74-76
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• 2005

수평형 에미터 스위치트 사이리스터(Lateral Emitter Switched Thyristor, LEST)의 고전압 전류 포화 특성을 위한 새로운 보호회로가 제안하였으며 성공적으로 제작 및 측정하였다. LEST의 부유(浮遊, floating) n+ 전압이 보호 MOSFET의 문턱 전압 보다 커지면 보호 회로는 LEST의 동작 모드를 regenerative 상태에서 non-regerative 상태로 전환시킨다. 일반적인 LEST의 전압 전류 포화 특성이 17 V로 제한되는 것에 비해 제안된 회로와 결합된 LEST는 200V 이상의 고전압 전류 포화 특성을 보였으며, Hard Switching Fault(HSF) 단락 회로 상황에서도 $10{\mu}s$ 이상 견디는 단락 회로 유지 능력을 보였다.

• 한국컴퓨터산업교육학회:학술대회논문집
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• 2003.11a
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• pp.71-74
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• 2003

A vertical trench electrode type EST has been proposed in this paper. The proposed device considerably improve the snap-back effect which leads to a lot of problem of device applications. In this paper, the vertical dual gate Emitter Switched Thyristor(EST) with trench electrode has been proposed for improving snap-back effect. It is observed that the forward blocking voltage of the proposed device is 800V. The conventional EST of the same size were no more than 633V. Because the proposed device was constructed of trench-type electrode, the electric field moved toward trench-oxide layer, and the punch through breakdown of the proposed EST is occurred at latest.

• Transactions on Electrical and Electronic Materials
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• v.4 no.2
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• pp.15-19
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• 2003

In this paper, the new dual trench gate Emitter Switched Thyristor (DTG-EST) is proposed for improving snap-back effect which leads to a lot of serious problems of device applications. Also the parasitic thyristor that is inherent in the conventional EST is completely eliminated in this structure, allowing higher maximum controllable current densities for ESTs. The conventional EST exhibits snap-back with the anode voltage and current density 2.73V and 35A/$\textrm{cm}^2$, respectively. But the proposed DTG-EST exhibits snap-back with the anode voltage and current density 0.96V and 100A/$\textrm{cm}^2$, respectively.