• 한국표면공학회지
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• 제33권2호
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• pp.101-106
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• 2000

SOI (Silicon-On-Insulator) substrates were fabricated with varying annealing temperature of $25-660^{\circ}C$ by a linear annealing method, which was modified RTA process using a linear shape heat source. The annealing method was applied to Si ∥ $SiO_2$/Si pair pre-contacted at room temperature after wet cleaning process. The bonding strength of SOI substrates was measured by two methods of Razor-blade crack opening and direct tensile test. The fractured surfaces after direct tensile test were also investigated by the optical microscope as well as $\alpha$-STEP gauge. The interface bonding energy was 1140mJ/m$^2$ at the annealing temperature of $430^{\circ}C$. The fracture strength was about 21MPa at the temperature of $430^{\circ}C$. These mechanical properties were not reported with the conventional furnace annealing or rapid thermal annealing method at the temperature below $500^{\circ}C$. Our results imply that the bonded wafer pair could endure CMP (Chemo-Mechanical Polishing) or Lapping process without debonding, fracture or dopant redistribution.

• E2M - 전기 전자와 첨단 소재
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• 제7권2호
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• pp.145-151
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• 1994

The multi-dielectric layer SiOz/Si3N4/SiO2(ONO) is used to scale down the memory device. In this paper, the change of composition in ONO layer due to the process condition and the conduction mechanism are observed. The composition of the oxide film grown through the oxidation of nitride film is analyzed using auger electron spectroscopy(AES). AES results show that oxygen concentration increases at the interface between oxide and nitride layers as the thickness -of the top oxide layer increases. Results of I-V measurement show that the insulating properties improve as the thickness of the top oxide layer increases. But when the thickness of the nitride layer decreases below 63.angs, insulating peoperties of film 28.angs. of top oxide and film 35.angs. turn over showing that insulating property of film 28.angs. of top oxide is better than that of film 35.angs. of top oxide. This phenomenon of turn over is thought as the result of generation of surface state due to oxygen flow into nitride during oxidation process. As the thickness of the top oxide and nitride increases, the electrical breakdown field increases, but when the thickness of top oxide reaches 35.angs, the same phenomenon of turn over occurs. Optimum film thickness for scaled multi-layer dielectric of memory device SONOS is estimated to be 63.angs. of nitride layer and 28.angs. of top oxide layer. In this case, maximum electrical breakdown field and leakage current are 18.5[MV/cm] and $8{\times}{10^-12}$[A], respectively.

• 대한전자공학회논문지TC
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• 제47권8호
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• pp.61-67
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• 2010

일반적으로 MIS(도체-부도체-반도체)의 다층 구조로 이루어진 대칭 결합선로에 대한 해석 절차는 모드(even and odd) 해석에 기초한 특성임피던스와 전파상수를 추출함으로서 단층의 결합선로 해석 절차와 동일하다. 본 논문에서는 손실매질의 다층구조로 이루어진 마이크로 스트립선로의 손실특성의 개선을 위한 새로운 구조를 제안한다. MIS 구조로 된 전송선로의 Si와 SiO2층 사이에 0전위를 가진 도체를 일정한 간격의 주기적인 배열로 고안된 새로운 모델의 MIS구조에 대한 유한차분법을 이용한 해석방법이 사용된다. 특히 전송선로에 대한 유전체의 영향을 줄이기 위하여 0전위를 가진 주기적인 결합의 도체로 이루어진 구조가 시간영역의 신호를 통해 시험된다. 다양한 손실률을 가진 불완전 유전체에 따른 주파수 의존적인 추출된 전송선로 파라미터와 등가회로 파라미터가 주파수 함수로서 나타내진다. 특히 본 논문에서 제안한 새로운 구조의 불완전 유전체에 대한 전송선로 파라미터가 주파수 함수로 구해진다.

• 대한전자공학회논문지TC
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• 제48권12호
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• pp.35-41
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• 2011

본 논문에서는 손실매질의 다층구조로 이루어진 마이크로 스트립선로의 손실특성의 개선을 위한 새로운 구조를 제안한다. MIS 구조로 된 전송선로의 Si와 SiO2층 사이에 0전위를 가진 도체를 일정한 간격의 주기적인 배열로 고안된 새로운 모델의 MIS구조에 대한 유한차분법을 이용한 해석방법이 사용된다. 특히 전송선로에 대한 유전체의 영향을 줄이기 위하여 0전위를 가진 주기적인 결합의 도체로 이루어진 구조가 시간영역의 신호를 통해 시험된다. 다양한 0전위 도체의 간격(갭)에 따른 주파수 의존적인 추출된 전송선로 파라미터와 등가회로 파라미터가 주파수 함수로서 나타내진다. 또한 본 논문에서 고안된 구조에 대해 특성임피던스와 유효유전상수의 큰 변화 없이 대칭 결합선로의 quality factor가 개선됨을 볼 수 있다.

• Transactions on Electrical and Electronic Materials
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• 제7권1호
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• pp.16-20
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• 2006

In this paper, we investigated the effects of short-term oxygen plasma treatment of semiconducting silicone layer to improve interfacial performances in joints prepared with a insulating silicone materials. Surface characterizations were assessed using contact angle measurement and x-ray photoelectron spectroscopy (XPS), and then adhesion level and electrical performance were evaluated through T-peel tests and electrical breakdown voltage tests of treated semi-conductive and insulating joints. Plasma exposure mainly increased the polar component of surface energy from $0.21\;dyne/cm^2$ to $47\;dyne/cm^2$ with increasing plasma treatment time and then leveled off. Based on XPS analysis, the surface modification can be mainly ascribed to the creation of chemically active functional groups such as C-O, C=O and COH on semi-conductive silicone surface. This oxidized rubber layer is inorganic silica-like structure of Si bound with three to four oxygen atoms ($SiO_x,\;x=3{\sim}4$). The oxygen plasma treatment produces an increase in joint strength that is maximum for 10 min treatment. However, due to brittle property of this oxidized layer, the highly oxidized layer from too much extended treatment could be act as a weak point, decreasing the adhesion strength. In addition, electrical breakdown level of joints with adequate plasma treatment was increased by about $10\;\%$ with model samples of joints prepared with a semi-conducting/ insulating silicone polymer after applied to interface.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 하계종합학술대회 논문집 II
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• pp.1045-1048
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• 2003

In this paper, we studied plasma damage of MIS capacitor with $Al_2$O$_3$ dielectric film. Using capacitor pattern with the same area but different perimeters, we tried to separate etching damage mechanism and to optimize the dry etching process. After etching both metal and dielectric layer by the same condition, leakage current and C-V measurements were carried out for Pt/A1$_2$O$_3$/Si structures. The flatband voltage shift was appeared in the C-V plot, and it was caused by the variation of the fixed interface charge and the interface trapped charge. From I-V measurement, it was found the leakage current along the periphery could not be ignored. Finally, we established the process condition of RF power 300W, 100mTorr, Ar/Cl$_2$ gas 60sccm as an optimal etching condition.

• Transactions on Electrical and Electronic Materials
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• 제6권1호
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• pp.1-5
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• 2005

Continued scaling of MOS devices requires the formation of the ultra shallow and very heavily doped junction. The simulation and experiment results show that the degradation of pMOS performance in logic and SRAM pMOS devices due to the excessive diffusion of the tail and a large amount of dose loss in the extension region. This problem comes from the high-temperature long-time deposition process for forming the spacer and the presence of fluorine which diffuses quickly to the $Si/SiO_{2}$ interface with boron pairing. We have studied the method to improve the pMOS performance that includes the low-energy boron implantation, spike annealing and device structure design using TCAD simulation.

• Applied Microscopy
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• 제36권spc1호
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• pp.25-33
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• 2006

Nanofabrication with finely focused ion and electron beams is reviewed, and position and size controlled fabrication of nano-metals and -semiconductors is demonstrated. A focused ion beam (FIB) interface attached to a column of 200keV transmission electron microscope (TEM) was developed. Parallel lines and dots arrays were patterned on GaAs, Si and $SiO_2$ substrates with a 25keV $Ga^+-FIB$ of 200nm beam diameter at room temperature. FIB nanofabrication to semiconductor specimens caused amorphization and Ga injection. For the electron beam induced chemical vapor deposition (EBI-CVD), we have discovered that nano-metal dots are formed depending upon the beam diameter and the exposure time when decomposable gases such as $W(CO)_6$ were introduced at the beam irradiated areas. The diameter of the dots was reduced to less than 2.0nm with the UHV-FE-TEM, while those were limited to about 15nm in diameter with the FE-SEM. Self-standing 3D nanostructures were also successfully fabricated.

• Journal of Industrial and Engineering Chemistry
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• 제67권
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• pp.417-428
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• 2018

In this study, we fabricated hierarchically self-assembled thin films composed of graphene oxide (GO) sheets and gold nanoparticles (Au NPs) using the Langmuir-Blodgett (LB) and Langmuir-Schaefer (LS) techniques and investigated their gas-sensing performance. First, a thermally oxidized silicon wafer ($Si/SiO_2$) was hydrophobized by depositing the LB films of cadmium arachidate. Thin films of ligand-capped Au NPs and GO sheets of the appropriate size were then sequentially transferred onto the hydrophobic silicon wafer using the LB and the LS techniques, respectively. Several different films were prepared by varying the ligand type, film composition, and surface pressure of the spread monolayer at the air/water interface. Their structures were observed by scanning electron microscopy (SEM) and atomic force microscopy (AFM), and their gas-sensing performance for $NH_3$ and $CO_2$ was assessed. The thin films of dodecanethiol-capped Au NPs and medium-sized GO sheets had a better hierarchical structure with higher uniformity and exhibited better gas-sensing performance.

• JSTS:Journal of Semiconductor Technology and Science
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• 제1권4호
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• pp.202-208
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• 2001

In Recent results suggested that doping $Ta_2O_5$ with a small amount of $TiO_2$ using standard ceramic processing techniques can increase the dielectric constant of $Ta_2O_5$ significantly. In this paper, this concept is studied using RTCVD (Rapid Thermal Chemical Vapor Deposition). Ti-doped $Ta_2O_5$ films are deposited using $TaC_{12}H_{30}O_5N$, $C_8H_{24}N_4Ti$, and $O_2$ on both Si and $NH_3$-nitrided Si substrates. An $NH_3$-based interface layer at the Si surface is used to prevent interfacial oxidation during the CVD process and post deposition annealing is performed in $H_2/O_2$ ambient to improve film quality and reduce leakage current. A sputtered TiN layer is used as a diffusion barrier between the Al gate electrode and the $TaTi_xO_y$ dielectric. XPS analyses confirm the formation of a ($Ta_2O_5)_{1-x}(TiO_2)_x$ composite oxide. A high quality $TaTi_xO_y$ gate stack with EOT (Equivalent Oxide Thickness) of $7{\AA}$ and leakage current $Jg=O.5A/textrm{cm}^2$ @ Vg=-1.0V has been achieved. We have also succeeded in forming a $TaTi_x/O_y$ composite oxide by rapid thermal oxidation of the as-deposited CVD TaTi films. The electrical properties and Jg-EOT characteristics of these composite oxides are remarkably similar to that of RTCVD $Ta_2O_5, suggesting that the dielectric constant of $Ta_2O_5$ is not affected by the addition of $TiO_2$.