Development of Linear Annealing Method for Silicon Direct Bonding and Application to SOI structure

실리콘 직접 접합을 위한 선형가열법의 개발 및 SOI 기판에의 적용

  • 이진우 (서울대학교 재료공학부) ;
  • 강춘식 (서울대학교 재료공학부) ;
  • 송오성 (시립대학교 재료공학과) ;
  • 양철웅 (성균관대학교 금속재료공학부)
  • Published : 2000.04.01

Abstract

SOI (Silicon-On-Insulator) substrates were fabricated with varying annealing temperature of $25-660^{\circ}C$ by a linear annealing method, which was modified RTA process using a linear shape heat source. The annealing method was applied to Si ∥ $SiO_2$/Si pair pre-contacted at room temperature after wet cleaning process. The bonding strength of SOI substrates was measured by two methods of Razor-blade crack opening and direct tensile test. The fractured surfaces after direct tensile test were also investigated by the optical microscope as well as $\alpha$-STEP gauge. The interface bonding energy was 1140mJ/m$^2$ at the annealing temperature of $430^{\circ}C$. The fracture strength was about 21MPa at the temperature of $430^{\circ}C$. These mechanical properties were not reported with the conventional furnace annealing or rapid thermal annealing method at the temperature below $500^{\circ}C$. Our results imply that the bonded wafer pair could endure CMP (Chemo-Mechanical Polishing) or Lapping process without debonding, fracture or dopant redistribution.

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