• Journal of IKEEE
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• v.22 no.4
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• pp.1006-1011
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• 2018

This paper proposes a three level buck converter utilizing multi-bit flying capacitor voltage control. The conventional three-level buck converter can not control the flying capacitor voltage, so that the operation is unstable or the circuit for controlling the flying capacitor voltage can not be applied to the PWM mode. Also when the load current is increased, an error occurs in the inductor voltage. The proposed structure can control the flying capacitor voltage in PWM mode by using differential difference amplifier and common mode feedback circuit. In addition, this paper proposes a 3bit flying capacitor voltage control circuit to optimize the operation of the three level buck converter depending on the load current, and a triangular wave generation circuit using the schmitt trigger circuit. The proposed 3-level buck converter is designed in $0.18{\mu}m$ CMOS process and has an input voltage range of 2.7V~3.6V and an output voltage range of 0.7V~2.4V. The operating frequency is 2MHz, the load current range is 30mA to 500mA, and the output voltage ripple is measured up to 32.5mV. The measurement results show a maximum power conversion efficiency of 85% at a load current of 130 mA.

• Journal of IKEEE
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• v.12 no.3
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• pp.172-175
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• 2008

An improved triangular/square-wave VCO using OTAs is presented. It consists of two OTAs, a timing capacitor, and a resistor. A prototype circuit built with commercially available components exhibits less than 0.01% nonlinearity in its current-to-frequency transfer characteristic from 0.2 to 14 kHz and 450 ppm/$^{\circ}C$ temperature coefficient of frequency over $-20^{\circ}C$ to $40^{\circ}$.

• Journal of Sensor Science and Technology
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• v.3 no.1
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• pp.46-53
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• 1994

In the following paper, the high frequency oscillation proximity sensor system, one of the sensor systems used in FA, is designed using CMOS. According to the proximity of metal objects, two differing amplitudes of sinusoidal waves are set, and by using rectifiers, dc voltages, which determine the constant current source circuit's output current levels, can be abstracted from these waves. To remove any disturbances in the dc voltage levels, a schmitt trigger is used. Some advantages of this CMOS high frequency oscillation proximity sensor are miniturization, light weight and low power disspation.

• Proceedings of the KIEE Conference
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• 2009.07a
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• pp.1416_1417
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• 2009

This paper shows the characteristic of wave tail according to inductance values in 10/$350{\mu}s$ impulse circuit with crowbar switch. The PSpice was used to simulate the 10/$350{\mu}s$ current waveform and lightning current impulse generator was used to generate real current waveform. As a capacitor of condenser bank increases, a virtual front time increases and a time to half-value decreases. To get a perfect 10/$350{\mu}s$ current waveform, we should consider the combination of circuit values of the inductance, capacitance, time difference between trigger pulses and charged voltage of capacitor bank.

• Proceedings of the KIPE Conference
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• 2002.07a
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• pp.205-208
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• 2002

The single phase induction motor(SPIM) with two windings, main and auxiliary winding, is widely used due to ruggedness, low maintenance and simplicity of construction. There are several ways of starting single phase induction motor. The most common method is to use centrifugal switch that is connected in series with a capacitor. But the centrifugal switch that is the external starting system has many problems. In this paper, we use triac to overcome defects that happen by centrifugal switch, Also we used inductor that connected with main winding to get a gate trigger voltage signal. Experiments are focused on a capacitor starling single phase induction motor.

• Proceedings of the Korean Biophysical Society Conference
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• 1996.07a
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• pp.42-42
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• 1996

Adrenal chromaffin cells secrete catecholamine in response to acetylcholine. The secretory response has absolute requirement for extracellular calcium, indicating that $Ca^{2+}$ influx through voltage operated $Ca^{2+}$ channels (VOCC) is the primary trigger of the secretion cascade. Although the existence of various types of $Ca^{2+}$ channels has been explore using patch clamp techique in adrenal chromaffin cells, the contribution of different types of $Ca^{2+}$ channels to catecholamine secretion remains to be establised. (omitted)omitted)

• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.8
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• pp.62-71
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• 1994

A novel semiconductor device is proposed to be used as a processing element for the implementation of pulse-mode neural networks which consists of alternating n' GaAs quantum wells and undoped AlGaAs barriers sandwitched between n' GaAs cathode and P' GaAs anode and in simple circuit in conjunction with a parallel capacitive and resistive load the trigger circuit generates neuron-like pulse train output mimicking the function of axon hillock of biological neuron. It showed the sigmoidal relationship between the frequency of the pulse-train and the applied input DC voltage. In conjunction with MQWIMD the various neural circuits are proposed especially a neural chip monolithically integrated with photodetectors in order to perfrom the pattern recognition.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.5
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• pp.50-57
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• 2008

In this paper, a high-efficiency charge pump for use in CMOS image sensor(CIS) is proposed. The proposed charge pump pursues high pumping efficiency by minimizing the switching and reversion losses by taking advantage of operation characteristics of CIS. That is, the proposed charge pump minimizes the switching loss by dynamically controlling the size of clock driver, pumping capacitor, and charge transfer switch based on the operation phase of CIS pixel sensor. The charge pump also minimizes the reversion loss by guaranteeing a sufficient non-overlapping period of local clocks using a tri-state local clock driver adapting the schmitt trigger. Comparison results using a 0.13-um CMOS process technology indicate that the proposed charge pump achieves up to 49.1% reduction on power consumption under no loading current condition as compared to conventional charge pump. They also indicate that the charge pump provides 19.0% reduction on power consumption under the maximum loading current condition.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.28 no.8
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• pp.40-46
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• 2014

The development of the superconducting fault current limiter (SFCL) to apply into a power transmission system where makes larger fault current compared to the power distribution system has been performed. Among various SFCLs, the trigger-type SFCL is suitable for application into the power transmission system due to the effective reduction on power burden of the high temperature superconducting element (HTSC) for the larger fault current. To protect the power transmission line in the power grid, the distance relay, which decides to interrupt fault section where can be calculated by the measured voltage and current from sound grid, is one of important protective devices in the power transmission system. However, the operation of the distance relay from the impedance of the fault point on the transmission line is affected by the impedance of the trigger-type SFCL. Therefore, the analysis on the operational characteristics of distance relay considering the application of the SFCL is required. In this paper, the effect on the operation zones of the distance relay by the impedance of the SFCL in a power transmission system was analyzed through the PSCAD/EMTDC simulation.

• Journal of IKEEE
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• v.20 no.4
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• pp.361-366
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• 2016

This paper presents the ESD protection circuit with improved electrical characteristic and area efficiency. The proposed ESD protection circuit has higher holding voltage and lower trigger voltage characteristics than the 3-Stacking LVTSCR. In addition, it has only two stages and has improved Ron characteristics due to short discharge path of ESD current. We analyzed the electrical characteristics of the proposed ESD protection circuit by TCAD simulator. The proposed ESD protection circuit has a small area of about 35% compared with 3-Stacking LVTSCR, The proposed circuit is designed to have improved latch-up immunity by setting the effective base length of two NPN parasitic bipolar transistors as a variable.