• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.03a
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• pp.21-21
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• 2010

(Ba,Sr)$TiO_3$ (BST) thin film with a perovskite structure has potential for the practical application in various functional devices such as nonvolatile-memory components, capacitor, gate insulator of thin-film transistors, and electro-optic devices for display. Normally, the BST thin films derived from sol-gel and sputtering are amorphous or partially crystalline when processed below $600^{\circ}C$. For the purpose of integrating BST thin film directly into a Si-based read-out integrated circuit (ROIC), it is necessary to process the BST film below $400^{\circ}C$. The microstructural and electrical properties of low-temperature crystallized BST film were studied. The BST thin films have been fabricated at $350^{\circ}C$ by UV-assisted rapidly thermal annealing (RTA). The BST films are in a single perovskite phase and have well-defined electrical properties such as high dielectric constant, low dielectric loss, low leakage current density, and high breakdown voltage. Photoexcitation of the organics contained in the sol-gel-derived films by high-intensity UV irradiation facilitates elimination of the organics and formation of the single-crystalline phase films at low temperatures. The amorphous BST thin film was transformed to a highly (h00)-oriented perovskite structure by high oxygen pressure processing (HOPP) at as low as $350^{\circ}C$. The dielectric properties of BST film were comparable to (or even better than) those of the conventionally processed BST films prepared by sputtering or post-annealing at temperature above $600^{\circ}C$. When external pressure was applied to the well-known contractive BST system during annealing, the nucleation energy barrier was reduced; correspondingly, the crystallization temperature decreased. The UV-assisted RTA and HOPP, as compatible with existing MOS technology, let the BST films be integrated into radio-frequency circuit and mixed-signal integrated circuit below the critical temperature of $400^{\circ}C$.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.06a
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• pp.8-9
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• 2006

Hafnium oxide ($HfO_2$) thin films were deposited on p-type (100) silicon wafers by atomic layer deposition (ALD) using TEMAHf and $O_3$. Prior to the deposition of $HfO_2$ films, a thin Hf ($10\;{\AA}$) metal layer was deposited. Deposition temperature of $HfO_2$ thin film was $350^{\circ}C$ and its thickness was $150\;{\AA}$. Samples were then annealed using furnace heating to temperature ranges from 500 to $900^{\circ}C$. The MOS capacitor of round-type was fabricated on Si substrates. Thermally evaporated $3000\;{\AA}$-thick AI was used as top electrode. In this work, We study the interface characterization of $HfO_2$/Hf/Si MOS capacitor depending on annealing temperature. Through AES(Auger Electron Spectroscopy), capacitance-voltage (C-V) and current-voltage (I-V) analysis, the role of Hf layer for the better $HfO_2$/Si interface property was investigated. We found that Hf meta1 layer in our structure effective1y suppressed the generation of interfacial $SiO_2$ layer between $HfO_2$ film and silicon substrate.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1998.11a
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• pp.291-294
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• 1998

The objective of this study is to deposited the preparation of STO dielectric thin films on Ag/barrier-mater/Si(N-type 100) bottom electrode using a conventional rf-magnetron sputtering technique with a ceramic target under various conditions. It is demonstrated that the leakage current of films are strongly dependent on the atmosphere during deposition and the substrate temperature. The resistivity properties of films deposited on silicon substrates were very high resistivity. Capacitance of the films properties were the highest value(1000pF) and dependent on substrate temperature.

• Journal of Korean Vacuum Science & Technology
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• v.4 no.1
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• pp.6-10
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• 2000

Ferroelectric YMnO$_3$ thin films were deposited on $Y_2$O$_3$/si(100) substrates by metalorganic chemical vapor deposition. The YMnO$_3$ thin films annealed in vacuum ambient (100 mTorr) above 75$0^{\circ}C$ show hexagonal structured YMnO$_3$. However, the film annealed in oxygen ambient shows poor crystallinity, and the second phase as $Y_2$O$_3$ and orthorhombic-YMnO$_3$ were shown. The annealing ambient and pressure on the crystallinity of YMnO$_3$ thin films is very important. The C-V characteristics have a hysteresis curve with a clockwise rotation, which indicates ferroelectric polarization switching behavior. When the gate voltage sweeps from +5 to 5 V, the memory window of the Pt/YMnO$_3$/Y$_2$O$_3$/Si gate capacitor annealed at 85$0^{\circ}C$ is 1.8 V. The typical leakage current densities of the films annealed in oxygen and vacuum ambient are about 10$^{-3}$ and 10$^{-7}$ A/cm$^2$ at applied voltage of 5 V.

• Proceedings of the KIEE Conference
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• 1998.11c
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• pp.740-742
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• 1998

In this paper, we described the effect of rapid thermal annealing on the electrical properties of interfacial layer between various top electrodes and $(Ba_{0.5}Sr_{0.5})TiO_3$ thin films. BST thin films were fabricated on Pt/TiN/$SiO_2$/Si substrate by RF magnetron sputtering technique. AI, Ag, and Cu films for the formation of top electrode were deposited on BST thin films by thermal evaporator. Top electrodes/BST/Pt capacitor annealed with rapid thermal annealing at various temperature. In $(Ba_{0.5}Sr_{0.5})TiO_3$ thin films with Cu top electrode annealed at $500^{\circ}C$, the dielectric constant was measured to the value of 366 at 1.2 [kHz] and the leakage current was obtained to the value of $5.85{\times}10^{-7}\;[A/cm^2}$ at the forward bias of 2 [V].

• Proceedings of the KIEE Conference
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• 2005.11a
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• pp.176-178
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• 2005

Ferroelectric $Bi_{3.25}Nd_{0.75}Ti_{3}O_{12}(BNdT)$ thin films were proposed for capacitor of FeRAM. The BNdT thin films were grown on Pt/Ti $SiO_2/P-Si(100)$ substrates by the RF magnetron sputtering deposition. The dielectric properties of the BNdT were investigated by varying deposition temperatures. Increasing deposition temperature, the (117) peak was increased. An increase of columnar and recrystalline structure of BNdT films with increasing deposition temperature was observed by the Field Emission Scanning Electron Microscopy(FE-SEM). The dielectric constant and dielectric loss of the BNdT thin films with deposition temperature of $600^{\circ}C$ were 319 and 0.05, respectively.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.63 no.1
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• pp.46-49
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• 2014

$Pb(Zr_{0.52}Ti_{0.48})O_3(PZT)$ thin films deposited on $Ru/RuO_2$ bottom electrode that grown for in-situ progress used rf magnetron sputtering method. We investigated the dependence of the crystalline and electrical properties in the way of capacitors PZT thin films. Our results show that all PZT films indicated polycrystalline perovskite structure with preferred orientation (110) and no pyrochlore phase is observed. The electric properties of the Ru improved with increasing Ru thin films thickness. A well-fabricated Ru/PZT/Ru (100 nm) /$RuO_2$ capacitor showed a leakage current density in the order of $2.03{\times}10^{-7}$ $A/cm^2$ as a 50 kV/cm, a remnant polarization (Pr) of 9.22 ${\mu}C/cm^2$, and a coercive field (-EC) of -32.22 kV/cm. The results show that $Ru/Ru/RuO_2$ bottom electrodes are expected to reduce the degradation ferroelectric fatigue and excellent ferroelectric properties.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.13 no.2
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• pp.143-150
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• 2000

Ferroelectric SrxBi2+yTa2O9+$\alpha$ thin films with various compositions(x=0.7, 0.8, 1, y=0.3, 0.4) were prepared by sol-gel method. The film with moled ratio of 0.8:2.3:2.0 in Sr/Bi/Ta, which was deposited on Pt/SiO2/Si (100), showed better ferroelectric properties than other films. To investigate substrate effects, the same compositions were spin coated on Pt/Ti/SiO2/Si (100) substrates. At an applied voltage of 5V, the dielectric constant($\varepsilon$r), remanent polarization (2Pr) and coercive field (Ec) of the Sr0.8Bi2.3Ta2O9+$\alpha$ thin film prepared on Pt/Ti/SiO2/Si (100) were about 296, 24$\mu$C/$\textrm{cm}^2$ and Ec of 49kV/cm respectively. Both SBT films firred at 80$0^{\circ}C$ revealed no fatigue up to 1010 cycles. Retention characteristics of these capacitors showed no degradation up to 104 sec.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.319-319
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• 2013

Even though the fabrication methods of metal oxide based thin film capacitor have been well established such as RF sputtering, Sol-gel, metal organic chemical vapor deposition (MOCVD), ion beam assisted deposition (IBAD) and pulsed laser deposition (PLD), an applicable capacitor of printed circuit board (PCB) has not realized yet by these methods. Barium Strontium Titanate (BST) and other high-k ceramic oxides are important materials used in integrated passive devices, multi-chip modules (MCM), high-density interconnect, and chip-scale packaging. Thin film multi-layer technology is strongly demanded for having high capacitance (120 nF/$mm^2$). In this study, we suggest novel multi-layer thin film capacitor design and fabrication technology utilized by plasma assisted deposition and photolithography processes. Ba0.6Sr0.4TiO3 (BST) was used for the dielectric material since it has high dielectric constant and low dielectric loss. 5-layered BST and Pt thin films with multi-layer sandwich structures were formed on Pt/Ti/$SiO_2$/Si substrate by RF-magnetron sputtering and DC-sputtering. Pt electrodes and BST layers were patterned to reveal internal electrodes by photolithography. SiO2 passivation layer was deposited by plasma-enhanced chemical vapor deposition (PE-CVD). The passivation layer plays an important role to prevent short connection between the electrodes. It was patterned to create holes for the connection between internal electrodes and external electrodes by reactive-ion etching (RIE). External contact pads were formed by Pt electrodes. The microstructure and dielectric characteristics of the capacitors were investigated by scanning electron microscopy (SEM) and impedance analyzer, respectively. In conclusion, the 0402 sized thin film multi-layer capacitors have been demonstrated, which have capacitance of 10 nF. They are expected to be used for decoupling purpose and have been fabricated with high yield.

• Transactions on Electrical and Electronic Materials
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• v.4 no.4
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• pp.13-17
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• 2003

This paper deals with the edge effect in thin insulating films, focusing on their dependence on film thickness. The finding is that the electric field is lowered at the edge as the film thickness is reduced, which, in turn, is closely related to dielectric breakdown voltage. In order to analyze this phenomenon, a simple capacitor model is introduced with which dependence of dielectric breakdown voltage around the electrode edge on the film thickness is explained. Due to analytical difficulty to get the expression of electrical field strength at the edge, an equivalent circuit approach is used to find the voltage expression first and then the electric field expression using it. The relation gets to an agreement with the experimental findings shown in the paper. This outcome may be extended to solve similar problems in multi-layer insulating films.