• 한국전기전자재료학회논문지
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• 제15권1호
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• pp.1-6
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• 2002

The hot carried degradation in a metal oxide semiconductor device has been one of the most serious concerns for MOS-ULSI. In this paper, three types of LDD(lightly doped drain) structure for suppression of hot carried degradation, such as decreasing of performance due to spacer-induced degradation and increase of series resistance will be investigated. in this study, LDD-nMOSFETs used had three different drain structure, (1) conventional surface type LDD(SL), (2) Buried type LDD(BL), (3) Surface implantation type LDD(SI). As experimental results, the surface implantation the LDD structure showed that improved hot carrier lifetime to comparison with conventional surface and buried type LDD structures.

• JSTS:Journal of Semiconductor Technology and Science
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• 제17권2호
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• pp.204-209
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• 2017

We have investigated a Mo/Au gate scheme for use in AlGaN/GaN-on-Si HFETs. AlGaN/GaN-on-Si HFETs were fabricated with Ni/Au or Mo/Au gates and their electrical characteristics were compared after thermal stress tests. While insignificant difference was observed in DC characteristics, the Mo/Au gate device exhibited lower on-resistance with superior pulsed characteristics in comparison with the Ni/Au gate device.

• 한국전기전자재료학회논문지
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• 제15권12호
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• pp.1021-1026
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• 2002

As the development of semiconductor process technology continue to advance, ICs continue their trend toward higher performance low power system-on-chip (SOC). These circuits require on board multi power supply. In this paper, a 0.5 ㎛ dual date oxide CMOS Process technology for multi-power application is demonstrated. 5 V and 20 V devices fabricated by proposed process is measured. From 5 V devices using dual gate precess, we got almost the same characteristics as are obtained from standard 5 V devices. And the characteristics of the 20 V device demonstrates that 3 ㎛ devices with minimum gate length are available without reliability degradation. Electrical parameters in minimum 3 ㎛ devices are 520 ㎂/㎛ current density, 120 ㎷ DIBL, 24 V BV for NMOS and ,350 ㎂/㎛ current density, 180 ㎷ DIBL, 26 V BV for PMOS, respectively.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1995년도 하계학술대회 논문집 A
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• pp.382-384
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• 1995

The advancement of power semiconductor devices has given great attribution to the performance and reliability or power conversion systems. But contemporary power devices have room for improvement. So much interest and endeavor are being applied to develop an improved power devices. The MOS-Controlled Thyristor(MCT)is a recently developed power device which combines four layers thyristor structure and MOS-gate. Owing to advantages compared to other devices in many respects, the MCT attracts much notice recently. Nowadays, in designing and manufacturing power conversion systems, the importance of circuit simulation for reducing cost and time is incensed. And to excute the simulation that resemble the real system as much as possible, to develop a model of power device that provides properly static and dynamic characteristics is important. So, this paper presents a PSPICE model of the MCT considering dynamic characteristics.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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• pp.268-268
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• 2016

Chemical sensors have attracted much attention due to their various applications such as agriculture product, cosmetic and pharmaceutical components and clinical control. A conventional chemical and biological sensor is consists of fluorescent dye, optical light sources, and photodetector to quantify the extent of concentration. Such complicated system leads to rising cost and slow response time. Until now, the most contemporary thin film transistors (TFTs) are used in the field of flat panel display technology for switching device. Some papers have reported that an interesting alternative to flat panel display technology is chemical sensor technology. Recent advances in chemical detection study for using TFTs, benefits from overwhelming progress made in organic thin film transistors (OTFTs) electronic, have been studied alternative to current optical detection system. However numerous problems still remain especially the long-term stability and lack of reliability. On the other hand, the utilization of metal oxide transistor technology in chemical sensors is substantially promising owing to many advantages such as outstanding electrical performance, flexible device, and transparency. The top-gate structure transistor indicated long-term atmosphere stability and reliability because insulator layer is deposited on the top of semiconductor layer, as an effective mechanical and chemical protection. We report on the fabrication of InGaZnO TFTs with silver nanowire as the top gate electrode for the aim of chemical materials detection by monitoring change of electrical properties. We demonstrated that the improved sensitivity characteristics are related to the employment of a unique combination of nano materials. The silver nanowire top-gate InGaZnO TFTs used in this study features the following advantages: i) high sensitivity, ii) long-term stability in atmosphere and buffer solution iii) no necessary additional electrode and iv) simple fabrication process by spray.

• 정보저장시스템학회:학술대회논문집
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• 정보저장시스템학회 2005년도 추계학술대회 논문집
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• pp.47-52
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• 2005

A lot of information storage devices have been introduced and developed for recently years. The trends of those devices are high capacity, compact size, low power consumption, reliability, and removability for data interchange with other device. As a satisfaction of these trends, near-field technique is in the spotlight as the next generation device. In order for a near-field recording to be successfully implemented in the storage device, a slider and suspension is introduced as actuating mechanism. The optical slider is designed considering near-filed optics. Suspension is not only supports slider performance, and tracking servo capacity but also meets the optical characteristics such as tilt aberration, and guarantee to satisfy shock performances for the mobility fir the actuator. In this study, the optical slider and the suspension for near-field probe array are designed and analyzed considering dynamic performance of head-gimbal assembly and shock simulation..

• ETRI Journal
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• 제39권6호
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• pp.866-873
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• 2017

We propose a multilayered-substrate-based power semiconductor discrete device package for a low switching loss and high heat dissipation. To verify the proposed package, cost-effective, low-temperature co-fired ceramic, multilayered substrates are used. A bare die is attached to an embedded cavity of the multilayered substrate. Because the height of the pad on the top plane of the die and the signal line on the substrate are the same, the length of the bond wires can be shortened. A large number of thermal vias with a high thermal conductivity are embedded in the multilayered substrate to increase the heat dissipation rate of the package. The packaged silicon carbide Schottky barrier diode satisfies the reliability testing of a high-temperature storage life and temperature humidity bias. At $175^{\circ}C$, the forward current is 7 A at a forward voltage of 1.13 V, and the reverse leakage current is below 100 lA up to a reverse voltage of 980 V. The measured maximum reverse current ($I_{RM}$), reverse recovery time ($T_{rr}$), and reverse recovery charge ($Q_{rr}$) are 2.4 A, 16.6 ns, and 19.92 nC, respectively, at a reverse voltage of 300 V and di/dt equal to $300A/{\mu}s$.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2007년도 추계학술대회 논문집
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• pp.94-95
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• 2007

In this paper, the dependence of electrical characteristics of Silicon-$Al_2O_3$-Nitride-Oxide-Silicon (SANOS) memory cell transistors and program speed, reliability of memory device on interface trap between Si substrate and tunneling oxide was investigated. The devices were fabricated by the identical processing in a single lot except the deposition method of the charge trapping layer, nitride. In the case of P/E speed, it was shown that P/E speed is slower in the SONOS cell transistors with larger interface trap density by charge blocking effect, which is confirmed by simulation results. However, the data retention characteristics show much less dependence on interface trap. Therefore, to improve SANOS memory characteristic, it is very important to optimize the interface trap and charge trapping layer.

• 한국추진공학회:학술대회논문집
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• 한국추진공학회 1994년도 제3회 학술강연회논문집
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• pp.21-26
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• 1994

Conventional electroexplosive devices (EED) commonly use a very small metal bridgewire to ignite explosive materials i.e. pyrotechnics, primary and secondary explosives. The use of semiconductor devices to replace “hot-wire” resistance heating elements in automotive safety systems pyrotechnic devices has been under development for several years. In a typical 1 amp/1 watt electroexplosive devices, ignition takes place a few milliseconds after a current pulse of at least 25 mJ is applied to the bridgewire. In contrast, as for a SCB devices, ignition takes place in a few tens of microseconds and only require approximately one-tenth the input energy of a conventional electroexplosive devices. Typically, when SCB device is driven by a short (20 $\mu\textrm{s}$), low energy pulse (less than 5 mJ), the SCB produces a hot plasma that ignites explosive materials. The advantages and disadvantages of this technology are strongly dependent upon the particular technology selected. To date, three distinct technologies have evolved, each of which utilizes a hot, silicon plasma as the pyrotechnic initiation element. These technologies are 1.) Heavily doped silicon as the resistive heating initiation mechanism, 2.) Tungsten enhanced silicon which utilizes a chemically vapor deposited layer of tungsten as the initiation element, and 3.) a junction diode, fabricated with standard CMOS processes, which creates the initial thermal environment by avalanche breakdown of the diode. This paper describes the three technologies, discusses the advantages and disadvantages of each as they apply to electroexplosive devises, and recommends a methodology for selection of the best device for a particular system environment. The important parameters in this analysis are: All-Fire energy, All-Fire voltage, response time, ease of integration with other semiconductor devices, cost (overall system cost), and reliability. The potential for significant cost savings by integrating several safety functions into the initiator makes this technology worthy of attention by the safety system designer.

• 마이크로전자및패키징학회지
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• 제29권2호
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• pp.1-10
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• 2022

최근 반도체 소자는 모바일 전자제품과 wearable 및 flexible한 소자와 기판의 다양한 활용으로 많은 분야에서 폭넓게 사용되고 있다. 이들 반도체 칩 접합 공정 중 기판과 솔더의 열팽창 계수(CTE)의 차이와 기판 및 부품 전체에 인가되는 과도한 열 영향은 소자의 성능 및 신뢰성에 영향을 주며, 최종적으로 휨(warpage) 현상 및 장기 신뢰성 저하 등을 초래한다. 이러한 문제점을 개선하기 위해 저온에서 공정이 가능한 저융점 솔더에 대한 연구가 활발히 진행되고 있다. Sn-Bi, Sn-In 등 다양한 저융점 솔더 합금 중 Sn-Bi 솔더는 높은 항복 강도, 적절한 기계적 특성 및 저렴한 가격 등의 이점이 있어 유망한 저온 솔더로 각광받고 있다. 그러나 Bi의 높은 취성 특성 등 단점으로 인해 솔더 합금의 개선이 필요하다. 본 review 논문에서는 다양한 미량 원소와 입자를 첨가하여 Sn-Bi 소재의 기계적 특성 개선을 위한 연구 동향을 소개하며 이를 비교 분석하였다.