References
-
H.S. Lee et al., "0.34
$V_T$ AlGaN/GaN-on-Si Large Schottky Barrier Diode with Recessed Dual Anode Metal," IEEE Electr. Device Lett., vol. 36, no. 11, Nov. 2015, pp. 1132-1134. https://doi.org/10.1109/LED.2015.2475178 - D. Ueda, "Renovation of Power Devices by GaN-Based Materials," IEEE Int. Electron. Devices Meeting (IEDM), Washington, DC, USA, Dec. 7-9, 2015, pp. 16.4.1-16.4.4.
- Y.R. Park et al., "Normally-off GaN MIS-HEMT Using a Combination of Recessed-Gate Structure and CF4 Plasma Treatment," Physica Status Solidi-A, vol. 212, no. 5, May 2015, pp. 1170-1173. https://doi.org/10.1002/pssa.201431737
- D. Reusch and H. Strydom, "Evaluation of Gallium Nitride Transistors in High Frequency Resonant and Soft-Switching DC-DC Converters," IEEE Trans Power Electron, vol. 30, no. 9, Sept. 2015, pp. 5151-5158. https://doi.org/10.1109/TPEL.2014.2364799
- D.Y. Jung et al., "Design and Evaluation of Cascode GaN FET for Switching Power Conversion Systems," ETRI J., vol. 39, no. 1, Feb. 2017, pp. 62-68. https://doi.org/10.4218/etrij.17.0116.0173
- H. Yano et al., "Threshold Voltage Instability in 4H-SiC MOSFETs with Phosphorus-Doped and Nitrided Gate Oxides," IEEE Trans. Electr. Devices, vol. 62, no. 2, Feb. 2015, pp. 324-332. https://doi.org/10.1109/TED.2014.2358260
- C. Dimarino, R. Burgos, and D. Boroyevich, "High-Temperature Silicon Carbide - Characterization of State-ofthe-Art Silicon Carbide Power Transistors," IEEE Ind. Electron. Mag., vol. 9, no. 3, Sept. 2015, pp. 19-30. https://doi.org/10.1109/MIE.2014.2360350
- Z. Liu et al., "Package Parasitic Inductance Extraction and Simulation Model Development for the High-Voltage Cascode GaN HEMT," IEEE Trans. Power Electron., vol. 29, no. 4, Apr. 2014, pp. 1977-1985. https://doi.org/10.1109/TPEL.2013.2264941
- W. Zhang et al., "A New Package of High-Voltage Cascode Gallium Nitride Device for Megahertz Operation," IEEE Trans. Power Electron., vol. 31, no. 2, Feb. 2016, pp. 1344-1353. https://doi.org/10.1109/TPEL.2015.2418572
- W.J. Chang et al., "Design of Parasitic Inductance Reduction in GaN Cascode FET for High-Efficiency Operation," ETRI J., vol. 38, no. 1, Feb. 2016, pp. 133-140. https://doi.org/10.4218/etrij.16.0115.0019
- M. Pavier et al., "High Frequency DC: DC Power Conversion: the Influence of Package Parasitics," IEEE Appl. Power Electron. Conf. Expo. (APEC 2003), Miami Beach, FL, USA, Feb. 9-13, 2003, pp. 699-704.
- T. Meade et al., "Parasitic Inductance Effect on Switching Losses for a High Frequency DC-DC Converter," IEEE Appl. Power Electron. Conf. Expo., Austin, TX, USA, Feb. 24-28, 2008, pp. 3-9.
- D.Y. Jung et al., "Multi-layer Substrate Based Power Semiconductor Package for Low Parasitic Inductance and High Heat Transfer," Asia-Pacific Workshop Fundam. Applicat. Adv. Semicond. Devices (AWAD 2016), Hakodate, Japan, July 4-6, 2016, pp. 283-285.
- F.W. Grover, Inductance Calculations, Mineola, NY, USA: Dover Publications, 2009.
- Y. Jin, Z. Wang, and J. Chen, Introduction to Microsystems Packaging Technology, Boca Raton, FL, USA: CRC Press/Taylor & Francis, 2010.
- P. Haaf and J. Harper, "Understanding Diode Reverse Recovery and its Effect on Switching Losses," Fairchild Power Seminar, 2007, pp. A23-A33.
- Global Power Technology, Accessed 2017. http://www.globalpowertech.cn/english/index.asp
Cited by
- Efficiency improvement of a DC/DC converter using LTCC substrate vol.41, pp.6, 2017, https://doi.org/10.4218/etrij.2018-0551
- Power module stray inductance extraction: Theoretical and experimental analysis vol.43, pp.5, 2021, https://doi.org/10.4218/etrij.2020-0420
- Theoretical and experimental analysis of a venting clip to reduce stray inductance in high‐power conversion applications vol.43, pp.6, 2017, https://doi.org/10.4218/etrij.2021-0024