• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.22 no.12
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• pp.1018-1022
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• 2009

In this paper, we proposed GaN trench Static Induction Transistor(SIT). Because The compound semiconductor had superior thermal characteristics, GaN and SiC power devices is next generation power semiconductor devices. We carried out modeling of GaN SIT with 2-D device and process simulator. As a result of modeling, we obtained 340 V breakdown voltage. The channel thickness was 3 urn and the channel doping concentration is $1e17\;cm^{-3}$. And we carried out thermal characteristics, too.

• Proceedings of the KIEE Conference
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• 2009.07a
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• pp.1009_1010
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• 2009

This paper presents a power supply system with pre-regulator using zero voltage switching (ZVS) interleaving two-transistor forward converter for high input voltage and high power application. A SMPS has a advantage that a good efficiency, small size and light weight but has a noise problem. A linear power supply system has a advantage that a good stability, low ripple and noise but has a disadvantage that a big size, low efficiency and heat problem. To alleviate these problems, we propose an power supply system using dual ZVS interleaving two-transistor forward pre-regulator. The proposed converter is verified on a 1kW, 50kHz experimental prototype.

• Journal of IKEEE
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• v.20 no.2
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• pp.163-166
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• 2016

It is important to operate the driving circuit under the optimal condition through precisely sensing the power consumption causing the temperature made mainly by the MOSFET (metal-oxide semiconductor field-effect transistor) when a BLDC (Brushless Direct Current) motor operates. In this letter, a Super-junction (SJ) power TMOSFET (trench metal-oxide semiconductor field-effect transistor) with an ultra-low specific on-resistance of $0.96m{\Omega}{\cdot}cm^2$ under the same break down voltage of 100 V is designed by using of the SILVACO TCAD 2D device simulator, Atlas, while the specific on-resistance of the traditional power MOSFET has tens of $m{\Omega}{\cdot}cm^2$, which makes the higher power consumption. The SPICE simulation for measuring the power distribution of 25 cells for a chip is carried out, in which a unit cell is a SJ Power TMOSFET with resistor arrays. In addition, the power consumption for each unit cell of SJ Power TMOSFET, considering the number, pattern and position of bonding, is computed and the power distribution for an ANSYS model is obtained, and the SJ Power TMOSFET is designed to make the power of the chip distributed uniformly to guarantee it's reliability.

• JSTS:Journal of Semiconductor Technology and Science
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• v.17 no.2
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• pp.216-222
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• 2017

The most prominent challenge for MOSFET scaling is to reduce power consumption; however, the supply voltage ($V_{DD}$) cannot be scaled down because of the carrier injection mechanism. To overcome this limit, a new type of field-effect transistor using positive feedback as a carrier injection mechanism (FBFET) has been proposed. In this study we have investigated the electrical characteristics of a $Si_{1-x}Ge_x$ FBFET with one gate and one-sided $Si_3N_4$ spacer using TCAD simulations. To reduce the drain bias dependency, $Si_{1-x}Ge_x$ was introduced as a low-bandgap material, and the minimum subthreshold swing was obtained as 2.87 mV/dec. This result suggests that a $Si_{1-x}Ge_x$ FBFET is a promising candidate for future low-power devices.

• Korean Journal of Air-Conditioning and Refrigeration Engineering
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• v.30 no.1
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• pp.1-9
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• 2018

Thermal performance of a heat sink for an inverter power stack was analyzed in terms of array and installation location of an Insulated Gate Bipolar Transistor (IGBT). Thermal flow around the heat sink was calculated with a numerical model that could simulate forced convection. Thermal performance was calculated depending on the array and location of high- and low-power IGBTs considering the maximum temperature of IGBT. The optimum array and installation location were found and causes were analyzed based on results of numerical analysis. For the numerical analysis, experiment design considered the installation location of IGBT, ratio of heat generation rates of high- and low-power IGBTs, and velocity of the inlet air as design variables. Based on numerical results, a correlation that could calculate thermal performance of the heat sink was suggested and the maximum temperature of the IGBT could be predicted depending on the installation method.

• Journal of Power Electronics
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• v.15 no.1
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• pp.131-145
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• 2015

The voltage-source inverters (VSI) supplying a motor drive are prone to open transistor faults. To address this issue in fault-tolerant drives applicable to electric vehicles, a new open transistor fault diagnosis (FD) method is presented in this paper. According to the proposed method, in order to define the FD index, the phase angle of the converter output current is estimated by a simple trigonometric function. The proposed FD method is adaptable, simple, capable of detecting multiple open switch faults and robust to load operational variations. Keeping the FD in mind as a mandatory part of the fault tolerant control algorithm, the FD block is applied to a five-phase converter supplying a multiphase fault-tolerant PM motor drive with non-sinusoidal unbalanced current waveforms. To investigate the performance of the FD technique, the fault-tolerant sliding mode control (SMC) of a five-phase brushless direct current (BLDC) motor is developed in this paper with the embedded FD block. Once the theory is explained, experimental waveforms are obtained from a five-phase BLDC motor to show the effectiveness of the proposed FD method. The FD algorithm is implemented on a field programmable gate array (FPGA).

• Journal of Power Electronics
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• v.17 no.2
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• pp.561-569
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• 2017

Power converter design requires simulation accuracy. In addition to the requirement of accurate models of power semiconductor devices, this paper highlights the role of considering a very good description of the converter circuit layout for an accurate simulation of its electrical behavior. This paper considers a simple experimental circuit including one switching cell where a MOSFET transistor controls the diode under test. The turn-off transients of the diode are captured, over which the circuit wiring has a major influence. This paper investigates the necessity for accurate modeling of the experimental test circuit wiring and the MOSFET transistor. It shows that a simple wiring inductance as the circuit wiring representation is insufficient. An adequate model and identification of the model parameters are then discussed. Results are validated through experimental and simulation results.

• Proceedings of the KIEE Conference
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• 2005.07d
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• pp.3058-3060
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• 2005

In this paper, the CMOS four-quadrant analog multipliers for low-voltage low-power applications are presented. The circuit approach is based on the characteristic of the LV (Low-Voltage) composite transistor which is one of the useful analog building blocks. SPICE simulations are carried out to examine the performances of the designed multipliers. Simulation results are obtained by $0.25{\mu}m$ CMOS parameters with 2V power supply. The LV composite transistor can easily be extended to perform a four-quadrant multiplication. The multiplier has a linear input range up to ${\pm}0.5V$ with a linearity error of less than 1%. The measured -3dB bandwidth is 290MHz and the power dissipation is $37{\mu}W$. The proposed multiplier is expected to be suitable for analog signal processing applications such as portable communication equipment, radio receivers, and hand-held movie cameras.

• Proceedings of the KIEE Conference
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• 1993.11a
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• pp.148-150
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• 1993

The IGBT(Insulated Gate Bipolar Transistor) is a power semiconductor device that has gained acceptance among power electronic circuit design engineers for motor drive and Power converter applications. The device-circuit interaction of power insulated gate bipolar transistor for a series-inductor load, both with and without a snubber are, simulated. An analytical model for the transient operation of the IGBT is used in conjunction with the load circuit state equations for the simulations.

• Proceedings of the KIEE Conference
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• 2003.04a
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• pp.276-280
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• 2003

This paper presents a zero voltage and zero current switching (ZVZCS) interleaving two-transistor forward converter for high input voltage and high power application. A phase shift has a disadvantage that a circulating current and RMS current stress, conduction losses of transformer and switching devices increases. Due to this circulating current and RMS current stress, conduction losses of transformer and switching devices increases. To alleviate these problems, we propose an improved interleaving two-transistor forward Zero Voltage and Zero Current Switching (ZVZCS) dc/dc converter using a tapped inductor a snubber capacitor and two snubber diodes attached at the secondary side of transformer. The proposed ZVZCS converter is verified on a 1.8kW, 5kHz experimental prototype.