• 제목/요약/키워드: low-power communication

검색결과 1,918건 처리시간 0.027초

의료용 센서 네트워크를 위한 저전력 델타 시그마 디지털 주파수 합성기 설계 (A Low-Power Design of Delta-Sigma Based Digital Frequency Synthesizer for Bio Sensor Networks)

  • 배정남;김진영
    • 한국인터넷방송통신학회논문지
    • /
    • 제17권5호
    • /
    • pp.193-197
    • /
    • 2017
  • 본 논문에서는 델타 시그마를 이용하여 고분해능의 주파수 튜닝 범위를 가지는 저전력 디지털 주파수 합성기를 제안한다. 의료 기기용 센서 장치는 배터리 사용 시간의 제약으로 인해 저전력, 고성능 RF (Radio Frequency) 트랜시버를 필요로 한다. 반도체 공정의 미세화로 인한 디지털 회로 설계 기법의 발전으로, 이전의 아날로그 회로 설계의 한계를 극복하고, 고성능의 집적화가 가능해 지고 있다. 따라서, 전력 소모를 줄이기 위해 디지털 회로 기반의 주파수 합성기를 설계했다. 높은 주파수 분해능을 가지기 위해 델타 시그마 변조기를 링 발진기에 적용하여, 소수부 튜닝을 구현했다. 모의실험을 통해 제안된 구조가 전력 및 분해능에서 우수한 성능을 보임을 확인하였다.

저전력 MOS 모놀리식 피크 감지기의 설계 (Design of a Low-Power MOS Monolithic Peak Detector)

  • 박광민;백경호
    • 대한전자공학회:학술대회논문집
    • /
    • 대한전자공학회 2000년도 하계종합학술대회 논문집(2)
    • /
    • pp.217-220
    • /
    • 2000
  • In this paper, A low-power MOS monolithic peak detector is presented. Designed for monolithic and low-power characteristics, this MOS peak detector can be integrated easily on the same chip as a module of large communication systems. The simulation results of this peak detector which was composed with four NMOSs and two capacitors show the power dissipation of 0.972㎽ and the good operations for 2㎓ operating pulse frequency. Therefore, it may be used as a functional block for various signal processing systems.

  • PDF

Zigbee통신을 이용한 전력변환기기의 DC Bus 커패시터의 온라인 원격 고장진단 시스템 (On-line Remote Diagnosis System for DC Bus Capacitor of Power Converters Using Zigbee Communication)

  • 정완섭;손진근
    • 전기학회논문지P
    • /
    • 제64권1호
    • /
    • pp.29-34
    • /
    • 2015
  • DC bus electrolytic capacitors are used in variety of equipments as smoothing element of the power converters because it has high capacitance for its size and low price. It is responsible for frequent breakdowns of many static converters and inverter drive systems. Therefore it is important to diagnosis monitoring the condition of an electrolytic capacitor in real-time to predict the failure of power converter. In this paper, the on-line remote diagnosis monitoring system for DC BUS electrolytic capacitors of power converter using low-cost type Zigbee communication modules is developed. To estimate the health status of the capacitor, the equivalent series resistor(ESR) of the component has to be determined. The capacitor ESR is estimated by using RMS computation using AC coupling method of DC link ripple voltage/current. The Zigbee communication-based experimental results show that the proposed remote DC capacitor diagnosis monitoring system can be applied to DC/DC converter and UPS successfully.

수중 센서 네트워크를 위한 저전력 수중 통신 모뎀 연구 (A Study on a Low Power Underwater Communication Modem for Implementation of Underwater Sensor Networks)

  • 최용우;황준혁;박동찬;김석찬
    • Journal of Advanced Marine Engineering and Technology
    • /
    • 제39권3호
    • /
    • pp.268-273
    • /
    • 2015
  • 최근 세계 각국에서 해양자원을 확보하고 해양환경 변화를 연구하기 위해 수중 센서 네트워크 관련 연구를 활발히 진행하고 있다. 현재 사용 중인 상용모뎀은 주로 특수목적용으로 장거리, 고가, 큰 소모전력, 대형 등의 특징을 지녀수중 센서 네트워크 구현에는 적합하지 않다. 이 논문에서는 비동기식 BFSK (Binary Frequency Shift Keying) 변조방식에 따른 간단한 수신회로, 초 저전력의 MCU (Micro Control Unit), 비교적 적은 연산량과 간단한 구현으로 동기 및 수신성능을 높이는 직교부호를 사용하여 수중 센서 네트워크에 적합한 소형 저전력 수중통신 모뎀을 구현한다. 다중경로가 심한 수조 및 외해 양식장에서 성능평가를 수행하여 $10^{-4}$ 미만의 비트오류율로 통신하는 것을 보인다.

A Wide Output Range, High Power Efficiency Reconfigurable Charge Pump in 0.18 mm BCD process

  • Park, Hyung-Gu;Jang, Jeong-A;Cho, Sung Hun;Lee, Juri;Kim, Sang-Yun;Tiwari, Honey Durga;Pu, Young Gun;Hwang, Keum Cheol;Yang, Youngoo;Lee, Kang-Yoon;Seo, Munkyo
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • 제14권6호
    • /
    • pp.777-788
    • /
    • 2014
  • This paper presents a wide output range, high power efficiency reconfigurable charge pump for driving touch panels with the high resistances. The charge pump is composed of 4-stages and its configuration automatically changes based on the required output voltage level. In order to keep the power efficiency over the wide output voltage range, internal blocks are automatically activated or deactivated by the clock driver in the reconfigurable charge pump minimizing the switching power loss due to the On and Off operations of MOSFET. In addition, the leakage current paths in each mode are blocked to compensate for the variation of power efficiency with respect to the wide output voltage range. This chip is fabricated using $0.18{\mu}m$ BCD process with high power MOSFET options, and the die area is $1870{\mu}m{\times}1430{\mu}m$. The power consumption of the charge pump itself is 79.13 mW when the output power is 415.45 mW at the high voltage mode, while it is 20.097 mW when the output power is 89.903 mW at the low voltage mode. The measured maximum power efficiency is 84.01 %, when the output voltage is from 7.43 V to 12.23 V.

Optimized Relay Selection and Power Allocation by an Exclusive Method in Multi-Relay AF Cooperative Networks

  • Bao, Jianrong;Jiang, Bin;Liu, Chao;Jiang, Xianyang;Sun, Minhong
    • KSII Transactions on Internet and Information Systems (TIIS)
    • /
    • 제11권7호
    • /
    • pp.3524-3542
    • /
    • 2017
  • In a single-source and multi-relay amplify-forward (AF) cooperative network, the outage probability and the power allocation are two key factors to influence the performance of an entire system. In this paper, an optimized AF relay selection by an exclusive method and near optimal power allocation (NOPA) is proposed for both good outage probability and power efficiency. Given the same power at the source and the relay nodes, a threshold for selecting the relay nodes is deduced and employed to minimize the average outage probability. It mainly excludes the relay nodes with much higher thresholds over the aforementioned threshold and thus the remainders of the relay nodes participate in cooperative forwarding efficiently. So the proposed scheme can improve the utility of the resources in the cooperative multi-relay system, as well as reduce the computational complexity. In addition, based on the proposed scheme, a NOPA is also suggested to approach sub-optimal power efficiency with low complexity. Simulation results show that the proposed scheme obtains about 2.1dB and 5.8dB performance gain at outage probability of $10^{-4}$, when compared with the all-relay-forward (6 participated relays) and the single-relay-forward schemes. Furthermore, it obtains the minimum outage probability among all selective relay schemes with the same number of the relays. Meanwhile, it approaches closely to the optimal exhaustive scheme, thus reduce much complexity. Moreover, the proposed NOPA scheme achieves better outage probability than those of the equal power allocation schemes. Therefore, the proposed scheme can obtain good outage probability, low computational complexity and high power efficiency, which makes it pragmatic efficiently in the single-source and multi-relay AF based cooperative networks.

A High Current Efficiency CMOS LDO Regulator with Low Power Consumption and Small Output Voltage Variation

  • Rikan, Behnam Samadpoor;Abbasizadeh, Hamed;Kang, Ji-Hun;Lee, Kang-Yoon
    • 전기전자학회논문지
    • /
    • 제18권1호
    • /
    • pp.37-44
    • /
    • 2014
  • In this paper we present an LDO based on an error amplifier. The designed error amplifier has a gain of 89.93dB at low frequencies. This amplifier's Bandwidth is 50.8MHz and its phase margin is $59.2^{\circ}C$. Also we proposed a BGR. This BGR has a low output variation with temperature and its PSRR at 1 KHz is -71.5dB. For a temperature variation from $-40^{\circ}C$ to $125^{\circ}C$ we have just 9.4mV variation in 3.3V LDO output. Also it is stable for a wide range of output load currents [0-200mA] and a $1{\mu}F$ output capacitor and its line regulation and especially load regulation is very small comparing other papers. The PSRR of proposed LDO is -61.16dB at 1 KHz. Also we designed it for several output voltages by using a ladder of resistors, transmission gates and a decoder. Low power consumption is the other superiority of this LDO which is just 1.55mW in full load. The circuit was designed in $0.35{\mu}m$ CMOS process.

0.18 ㎛ CMOS 공정을 이용한 저 전력 1 Ms/s 12-bit 2 단계 저항 열 방식 DAC (A Low-Power 1 Ms/s 12-bit Two Step Resistor String Type DAC in 0.18 ㎛ CMOS Process)

  • 유명섭;박형구;김홍진;이동수;이성호;이강윤
    • 전자공학회논문지
    • /
    • 제50권5호
    • /
    • pp.67-74
    • /
    • 2013
  • 본 논문은 무선 센서분야를 위한 1MS/s rate의 저 전력 12-bit 2단계 저항 열 DAC를 제시하고 있다. 2단계 저항 열 구조를 채택함으로써 복잡함을 줄이고, 소비 전력을 최소화 하고 변환속도를 증가 시킬 수 있었다. 이 칩은 $0.18{\mu}m$ CMOS 공정에서 제작 되었으며, Die 면적은 $0.76{\mu}m{\times}0.56{\mu}m$ 이다. 1.8V의 공급 전압으로부터 측정된 전력 소비는 1.8 mW 이다. 샘플링 주파수가 1MHz 이하에서 측정된 동적 동작범위(Spurious-Free Dynamic Range: SFDR)은 70dB 이다.

Mutual Authentication Protocol Using a Low Power in the Ubiquitous Computing Environment

  • Cho Young-bok;Kim Dong-myung;Lee Sang-ho
    • 대한원격탐사학회:학술대회논문집
    • /
    • 대한원격탐사학회 2004년도 Proceedings of ISRS 2004
    • /
    • pp.91-94
    • /
    • 2004
  • Ubiquitous sensor network is to manage and collect information autonomously by communicating user around device. Security requirements in Ubiquitous based on sensor network are as follows: a location of sensor, a restriction of performance by low electric power, communication by broadcasting, etc. We propose new mutual authentication protocol using a low power of sensor node. This protocol solved a low power problem by reducing calculation overload of sensor node using two steps, RM(Register Manager) and AM(Authentication Manager). Many operations performing the sensor node itself have a big overload in low power node. Our protocol reduces the operation number from sensor node. Also it is mutual authentication protocol in Ubiquitous network, which satisfies mutual authentication, session key establishment, user and device authentication, MITM attack, confidentiality, integrity, and is safe the security enemy with solving low electric power problem.

  • PDF

Multiple Brillouin Stokes Generation Utilizing a Linear Cavity Erbium-Doped Fiber Laser

  • AL-Mansoori, Mohammed Haydar;Noordin, Nor Kamariah;Saripan, M. Iqbal;Mahdi, Mohd Adzir
    • Journal of Communications and Networks
    • /
    • 제10권1호
    • /
    • pp.1-4
    • /
    • 2008
  • This paper reports the design of a multiwavelength fiber laser source that utilizes a linear cavity of hybrid Brillouin/Erbium fiber laser (BEFL). The output power, threshold power and free running cavity modes were investigated against the pump powers. The structure exhibited low threshold operation of 4 mW at 2.3 mW injected Brillouin pump power. The optimization of Brillouin pump wavelength, power and Erbium gain led to a maximum possible number of channels generated. Simultaneous and stable operation of 21 channels with 10.88 GHz channels spacing were obtained from this architecture at 1 mW injected Brillouin pump power and 90 m W Erbium doped fiber pump power in the 1555 nm region.