Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)

The Institute of Electronics and Information Engineers (대한전자공학회)
권호 표지

Design of a Low-Power MOS Monolithic Peak Detector

저전력 MOS 모놀리식 피크 감지기의 설계

  • 박광민 (순천향대학교 정보기술공학부) ;
  • 백경호 (순천향대학교 정보기술공학부)
  • Published : 2000.06.01
Download PDF
⟨ Previous Next ⟩

Abstract

In this paper, A low-power MOS monolithic peak detector is presented. Designed for monolithic and low-power characteristics, this MOS peak detector can be integrated easily on the same chip as a module of large communication systems. The simulation results of this peak detector which was composed with four NMOSs and two capacitors show the power dissipation of 0.972㎽ and the good operations for 2㎓ operating pulse frequency. Therefore, it may be used as a functional block for various signal processing systems.

Keywords