• Proceedings of the Korean Institute of Building Construction Conference
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• 2011.05b
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• pp.133-136
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• 2011

This study concerned with the steel beam of bonding method and bonded steel beams by this method and both ends of different height, steel beams and steel beams in the center makes the junction. Both ends and the central part of steel beams connecting the lower flange by additional combining steel plates to convey stress, the stress to focus on the beam connections are passed to both ends of steel beams, and strength of beam connections is improved and steel structural beams is proposed to minimize the loss by Incision. If you use the developed method, the construction period is shortened, and reducing the amount of material can decrease the cost and reduction in floor height can be maximized business feasibility.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.667-670
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• 2003

Ni-silicide has low thermal stabiliy. This point is obstacle to apply NiSi to devices. So In this paper, we have studied for obtain thermal stability and analysis of dopant dependency of NiSi. And then we applied Ni-silicide to devices. To improvement of thermal stability, we deposit Ni70/Co10/Ni30/TiN100 to sample. Co midlayer is enhanced thermal stability of NiSi. Co/Ni/TiN, this structure show very difference between n-poly and p-poly in sheet resistance. But Ni/Co/Ni/TiN, structure show less difference. Also junction leakage is good.

• Rapid Communication in Photoscience
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• v.4 no.2
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• pp.29-30
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• 2015

Since the first report on long-term durable perovskite solar cell in 2012, a surge of interest in perovskite solar cell has been received due to its superb photovoltaic performance exceeding 20%. $MAPbI_3$ ($MA=CH_3NH_3$) perovskite film is able to be prepared simply by solution processesof either sequential two-step or single step procedure. Since $MAPbI_3$ shows balanced charge transport property with micrometer scale charge diffusion length, it can be applied to any kind of junction structures. Mostly studied structure is mesoscopic structure employing mesoporous oxide layer in perovskite film. Photovoltaic performance is primarilyin fluenced by the quality of perovskite film but interfaces are equally important. In this mini review, emergence and evolution of perovskite solar cell are described.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 1996.04a
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• pp.294-298
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• 1996

This paper presents an attempt to find the physical structure of dynamic systems which achieves the behavior of a given system function. The scheme pursued by te paper would be regarded as synthesizing dynamic systems, and a method to synthesize them analytically is proposed by means of bond graph prototypes. The method proposed adopts several concepts used to synthesize networks in the electrical field, but yet demonstrates its own strengths such as the freedom from the causality assignment and determination of junction types. Also, it is shown that this method has further advantages in reticulating a given specification into feedforward and feedback expansions relative to electrical network synthesis and the method introduced by Redfield. The proposed method is examined through an example to trace the outline of the analytical synthesis of dynamic systems using bond graph prototypes.

• Journal of IKEEE
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• v.10 no.2 s.19
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• pp.141-148
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• 2006

In this study, the design of advanced LVDS(Low Voltage Differential Signaling) I/O interface circuit with new structural low triggering ESD (Electro-Static Discharge) protection circuit was investigated. Due to the differential transmission technique and low signal swing range, maximum transmission data ratio of designed LVDS transmitter was simulated to 5Gbps. And Zener Triggered SCR devices to protect the ESD Phenomenon were designed. This structure reduces the trigger voltage by making the zener junction between the lateral PNP and base of lateral NPN in SCR structure. The triggering voltage was simulated to 5.8V. Finally, The high speed I/O interface circuit with the low triggered ESD protection device in one-chip was designed.

• Journal of IKEEE
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• v.10 no.2 s.19
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• pp.149-155
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• 2006

In this study, the design of low voltage DC-DC converter with low triggering ESD (Electro-Static Discharge) protection circuit was investigated. The purpose of this paper is design optimization for low voltage(2.5V to 5.5V input range) DC-DC converter using CMOS switch. In CMOS switch environment, a dominant loss component is not switching loss but conduction loss at 1.2MHz switching frequency. In this study a constant frequency PWM converter with synchronous rectifier is used. And zener Triggered SCR device to protect the ESD phenomenon was designed. This structure reduces the trigger voltage by making the zener junction between the lateral PNP and base of lateral NPN in SCR structure. The triggering voltage was simulated to 8V.

• Journal of the Korean Institute of Telematics and Electronics
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• v.25 no.7
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• pp.774-779
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• 1988

The homo and hetero-junction diodes were fabricated using BP-Si structure. After removal of Si substrates, schottky diodes were fabricated on the BP bulk. The electrical properties of the diode were examined through current-voltage characteristics curve. The schottky diode with Sb electrode has a cut-in voltage of 0.33V. This value is almost equal to that of the typical schottky diodes. The breakdown voltage of the schottky diode is 30V. When BP was used for photo cell as a window, the conversion efficiency improved from 6.5% to 8.3%, and optical transmissivity of BP invreased in short wavelength region.

• Journal of the Korea Society for Simulation
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• v.17 no.2
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• pp.13-19
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• 2008

New Buffered deposition is proposed to decrease junction electric field in this paper. Buffered deposition process is fabricated after first gate etch, followed NM1 ion implantation and deposition & etch nitride layer. New Buffered deposition structure has buffer layer to decrease electric field. Also we compared the hot carrier characteristics of Buffered deposition and conventional. Also, we design a test pattern including NMOSFET, PMOSFET, LvtNMOS, High pressure N/PMOSFET, so that we can evaluate DC/AC hot carrier degradation on-chip. As a result, we obtained 10 years hot carrier life time satisfaction.

• Carbon letters
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• v.14 no.3
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• pp.171-174
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• 2013

The high quality contact between graphene and the metal electrode is a crucial factor in achieving the high performance of graphene transistors. However, there is not sufficient research about contact resistance reduction methods to improve the junction of metal-graphene. In this paper, we propose a new method to decrease the contact resistance between graphene and metal using directly grown graphene over a metal surface. The study found that the grown graphene over copper, as an intermediate layer between the copper and the transferred graphene, reduces contact resistance, and that the adhesion strength between graphene and metal becomes stronger. The results confirmed the contact resistance of the metal-graphene of the proposed structure is nearly half that of the conventional contact structure.

• Journal of IKEEE
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• v.7 no.1 s.12
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• pp.1-8
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• 2003

In this study, the high performance BCD device structure which satisfies the high voltage and fast switching speed characteristics is devised. Through the process and device simulation, optimal process spec. & device spec. are designed. We adapt double buried layer structure, trench isolation process, n-/p-drift region formation and shallow junction technology to optimize an electrical property as mentioned above. This I.C consists of 20V level high voltage bipolar npn/pnp device, 60V level LDMOS device, a few Ampere level VDMOS, 20V level CMOS device and 5V level logic CMOS.