• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2000년도 추계종합학술대회 논문집(2)
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• pp.9-12
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• 2000

InP/lnGaAs heterojunciton phototransistors (HPTs) with transparent emitter contacts were fabricated and characterized. Indium Tin Oxide was RF sputtered for the emitter contacts. By comparison with InP/InGaAs HBTs, the dc characteristics of InP/lnGaAs HPTs demonstrated offset voltage due to ITO emitter contacts and similar common emitter current gain. The model parameters were extracted and a simple SPICE simulations were performed.

• 한국전기전자재료학회논문지
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• 제20권3호
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• pp.268-272
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• 2007

A fully integrable InP/InGaAs HPT with an ITO emitter contact was first fabricated by employing a $SiO_2$ passivation layer. The electrical and the optical characteristics of the HPT with a passivation layer were measured and compared with those of the HPT without a passivation layer. The only noticeable difference was the increased emitter series resistance of the HPT with a passivation layer. AES analysis was performed to explain the reason of the increased emitter series resistance. Results show that PECVD $SiO_2$ deposition and annealing processes cause the diffusion of oxygen to the interface and the depletion of tin at the interface, which may be responsible for the increase of the series resistance.

• 전자공학회논문지A
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• 제32A권2호
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• pp.66-72
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• 1995

Using the Si/SiGe layer grown by solid source molecular beam epitaxy(SSMBE) on the LOCOS-patterned wafers, an emitter-base self-aligned hterojunction biplar transistor(HBT) with the polysilicon-emitter and the silicon germanium(SiGe) base has been fabricated. Trech isolation process, planarization process using a chemical-mechanical poliching, and the selectively implanted collector(SIC) process were performed. A titanium disilicide (TiSi$_{2}$), as a base electrode, was used to reduce an extrinsic base resistance. To prevent the strain relaxation of the SiGe epitaxial layer, low temperature (820${^\circ}C$) annealing process was applied for the emitter-base junction formation and the dopant activation in the arsenic-implanted polysilicon. For the self-aligned Si/SiGe HBT of 0.9${\times}3.8{\mu}m^{2}$ emitter size, a cut-off requency (f$_{T}$) of 17GHz, a maximum oscillation frequency (f$_{max}$) of 10GHz, a current gian (h$_{FE}$) of 140, and an emitter-collector breakdown voltage (BV$_{CEO}$) of 3.2V have been typically achieved.

• Transactions on Electrical and Electronic Materials
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• 제3권1호
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• pp.4-8
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• 2002

The typical mold method for FED (field emission display) fabrication is used to form a gate electrode, a gate oxide layer, and emitter tip after fabrication of a mold shape using wet-etching of Si substrate. However, in this study, new mold method using a side wall space structure was developed to make sharp emitter tips with the gate electrode. In new method, gate oxide layer and gate electrode layer were deposited on a Si wafer by LPCVD (low pressure chemical vapor deposition), and then BPSG (Boro phosphor silicate glass) thin film was deposited. After then, the BPSG thin film was flowed into the mold at high temperature in order to form a sharp mold structure. TiN was deposited as an emitter tip on it. The unfinished device was bonded to a glass substrate by anodic bonding techniques. The Si wafer was etched from backside by KOH-deionized water solution. Finally, the sharp field emitter array with gate electrode on the glass substrate was formed.

• 전기학회논문지
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• 제61권7호
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• pp.1001-1006
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• 2012

This paper presents a carbon nanotube (CNT) triode-structure field emitter as an ion source in a micro time-of-flight mass spectrometer(TOF-MS). In the ion source by field emission, the electrons emitted from cathodes under an electric field accelerated to the anode and ionize gas molecules by impact before arriving the anode. The generated positive ions are to be accelerated to the ion collector. Whereas most of ions are drawn to the cathodes in diode field emitters, a grid in the triode field emitter prevents the ions from being drawn to the cathodes. The triode field emitter is fabricated by micromachining. The cathode is composed of six CNT cylinders. The total size of the fabricated device is $8.0{\times}7.3{\times}1.9mm^3$. The anode and the grid current of the fabricated CNT field emitter were measured for various anode and grid voltages. When the anode and the grid voltages are 1000 V and 990 V, respectively, the emission current passing through the ionization region is 8.6 ${\mu}A$, which is a sufficient emission current for ionization and mass spectrometry.

• 전기전자학회논문지
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• 제25권2호
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• pp.371-375
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• 2021

본 논문에서는 고전압과 고온에서 사용할 수 있는 SiC 기반의 LIGBT 구조를 제시한다. 낮은 전류 특성을 향상시키기 위해 Gate를 중심으로 대칭되는 Dual-Emitter가 삽입된 것이 특징이다. 제안된 소자의 특성 검증을 위하여 Sentaurus TCAD simulation을 이용하여 시뮬레이션을 진행하였고 일반적인 LIGBT와 비교 연구를 진행하였다. 뿐만 아니라, 소수캐리어에 의한 전기적 특성을 검증하기 위해 N-drift 영역의 길이에 대하여 변수를 지정하여 Split을 진행하였다. 시뮬레이션 분석 결과, 제안된 Dual-Emitter 구조는 기존의 LIGBT보다 동일한 전압에서 높은 전류가 흐르는 것을 확인하였다.

• 한국신재생에너지학회:학술대회논문집
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• 한국신재생에너지학회 2010년도 춘계학술대회 초록집
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• pp.91.2-91.2
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• 2010

The use of plated front contact for metallization of silicon solar cell may alternative technologies as a screen printed and silver paste contact. This technologies should allow the formation of contact with low contact resistivity a high line conductivity and also reduction of shading losses. The better performance of Ni/Cu contacts is attributed to the reduced series resistance due to better contact conductivity of Ni with Si and subsequent electroplating of Cu on Ni. The ability to pattern narrower grid lines for reduced light shading combined with the lower resistance of a metal silicide contact and improved conductivity of plated deposit. This improves the FF as the series resistance is deduced. This is very much required in the case of low concentrator solar cells in which the series resistance is one of the important and dominant parameter that affect the cell performance. A selective emitter structure with highly dopes regions underneath the metal contacts, is widely known to be one of the most promising high-efficiency solution in solar cell processing. This paper using selective emitter structure technique, fabricated Ni/Cu plating metallization cell with a cell efficiency of 17.19%.

• 한국결정성장학회지
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• 제18권5호
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• pp.179-183
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• 2008

n형 실리콘를 이용히여 후면에 Al-emitter형성에 관해 �x처리조건이 Voc에 어떤 영향을 미치는지 알아보기 위하여 screen printing 방법으로 n-type Si 기판에 Al을 도포하였다. 열처기는 straight profile에서 50 inch/min의 belt speed로 $850^{\circ}C$의 peak temperature로 수행한 경우 가장 높은 Voc(585 mV)값을 보였고, 이 온도보다 낮은 경우에 불 균일한 Al-Si alloy 층이 형성되고, 이 온도보다 높은 경우에 Al층으로 Si 원자의 이동이 극심하게 발생되어 Al-Si alloy층이 파괴되는 현상으로 인하여 Voc가 감소함을 보았다.

• 한국광학회지
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• 제13권4호
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• pp.314-318
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• 2002

저전압(~1 ㎸)에서 구동되어 수 ㎁의 전류를 얻을 수 있는 초소형 전자 칼럼(microcolumn) 설계를 위한 프로브(probe) 빔의 직경이 최소가 되는 전자 광학계의 조건을 조사하였다. 프로브 빔의 최소 직경은 전자 방출원의 특성에 의존하는데, 동일 조건의 광학계에 대하여 thermal field emitter(TFE)인 경우 ~20 ㎚인 반면 cold field emitter(CFE)인 경우 ~10 ㎚인 것으로 조사되었다.

• 전기전자학회논문지
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• 제15권2호
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• pp.164-170
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• 2011

본 논문에서는 기존 LIGBT의 컬렉터와 에미터 사이에 추가적으로 에미터를 형성한 이중-에미터 구조의 LIGBT를 제안한다. 이중-에미터 LIGBT 구조는 추가된 에미터에 의해 향상된 래치-업 전류밀도, 순방향 전압강하와 빠른 턴-온 시간을 갖는다. 시뮬레이션 결과 이중-에미터 LIGBT 구조는 기존 LIGBT 구조보다 향상된 순방향 전압강하(1.05V), 높은 래치-업 전류($2.5{\times}10^3\;A/{\mu}m^2$), 빠른 턴-온 시간(7.4us)을 가짐을 확인 한다.