• The Journal of Korean Institute of Communications and Information Sciences
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• v.42 no.4
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• pp.864-870
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• 2017

This paper describes a Dual Buck Converter with mode control using variable Frequency to Voltage for portable devices requiring wide load current. The inherent problems of PLL compensation and efficiency degradation in light load current that the conventional hysteretic buck converter has faced have been resolved by using the proposed Dual buck converter which include improved PFM Mode not to require compensation. The proposed mode controller can also improve the difficulty of detecting the load change of the mode controller, which is the main circuit of the conventional dual mode buck converter, and the slow mode switching speed. the proposed mode controller has mode switching time of at least 1.5us. The proposed DC-DC buck converter was implemented by using $0.18{\mu}m$ CMOS process and die size was $1.38mm{\times}1.37mm$. The post simulation results with inductor and capacitor including parasitic elements showed that the proposed circuit received the input of 2.7~3.3V and generated output of 1.2V with the output ripple voltage had the PFM mode of 65mV and 16mV at the fixed switching frequency of 2MHz in hysteretic mode under load currents of 1~500mA. The maximum efficiency of the proposed dual-mode buck converter is 95% at 80mA and is more than 85% efficient under load currents of 1~500mA.

• Journal of IKEEE
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• v.24 no.4
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• pp.1074-1080
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• 2020

This paper proposes a digitally controlled buck converter insensitive to process, voltage and temperature and capable of three modes of operation depending on the state of the output voltage. Conventional digital-controlled buck converters utilized A/D converters, counters and delay line circuits for accurate output voltage control, resulting in increasing the number of counter and delay line bits. This problem can be resolved by employing the 8-bit and 16-bit bidirectional shift registers, and this design technique leads a buck converter to be able to control duty ratio up to 128-bit resolution. The proposed buck converter was designed and fabricated with a CMOS 180 nano-meter 1-poly 6-metal process, generating an output voltage of 0.9 to 1.8V with the input voltage range of 2.7V to 3.6V, a ripple voltage of 30mV, and a power efficiency of up to 92.3%. The transient response speed of the proposed circuit was measured to be 4us.

• Journal of Satellite, Information and Communications
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• v.12 no.2
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• pp.89-93
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• 2017

This paper introduces an energy harvesting system that generates energy by collecting multi-band RF signals using buck-boost DC-DC converter. In an environment where the resistance of load using the collected electric energy is constantly changing, a buck-boost DC-DC converter is used in which the input resistance of the DC-DC converter does not change even if the load resistance changes. Since the frequency band of the input RF signal varies, the rectifier is designed for each band so that multiple bands can be processed, and a matching circuit is added to each band in front of the rectifier. For a rectifier to collect very small RF signals, a circuit is designed so that a constant voltage is obtained according to a very small input signal by devising a method of continuously accumulating the voltages collected and generated in each band. It is confirmed that the output efficiency can reach up to 20% even for the RF signal having the input of -20 dBm.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.9
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• pp.1763-1770
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• 2016

This paper proposed hybrid converter to operate over a wide output load power. The switched-capacitor converter has a high efficiency at low load power and a low efficiency at high load power. On the contrary, the buck converter has a high efficiency at high load power and a low efficiency at low load power. The proposed hybrid converter has combination of the switched-capacitor converter and the buck converter. The switched-capacitor operates at low load power and buck converter operates at high load power, so that the hybrid converter is improved power efficiency at wide output load power. The hybrid converter was implemented with a $0.18{\mu}m$ CMOS process. The hybrid converter has a range of the load power between $50{\mu}W$and 100mW. The maximum power efficiencies are 93% and 77% at the buck converter and the switched-capacitor converter, respectively.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.24 no.5
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• pp.29-36
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• 2010

In this paper, we propose a single-phase inverter system using new modulation method. The proposed system is composed of a buck-boost converter and an inverter and controlled by PWAM scheme. PWAM method is a new modulation method which is the incorporation of PWM(Pulse Width Modulation) and PAM(Pulse Amplitude Modulation) methods. The DC voltage which is the input voltage of buck-boost converter is converted into a variable DC voltage by buck-boost converter. Also, the variable DC voltage which is the output voltage of buck-boost converter is converted into a sinusoidal AC voltage by inverter. The input voltage of inverter is processed by PWM switching in PWM section and bypassed in PAM section. By using PWAM method, switching action is not existed in PAM section and thus the times of switching is reduced. As a result, the switching loss can be reduced.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2011.10a
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• pp.411-414
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• 2011

This paper describes a tripple-mode DC-DC buck converter with DPSS Fucntion. The DC-DC buck converter operate in PWM(Pulse Width Modulation) mode at moderate to heavy loads(80mA~500mA), in PFM(Pulse Frequency Modulation)at light loads(1mA~80mA), and in LDO(Low Drop Out) mode at the sleep mode(<1mA). In PFM mode DPSS(Dynamic Partial Shutdown Strategy) is also employed to increase the efficiency at light loads. The triple-mode converter can thus achieve high efficiencies over wide load current range. The proposed DC-DC converter is designed in a CMOS 0.18um technology. It has a maximum power efficiency of 97.02% and maximum output current of 500mA. The input and output voltages are 3.3V and 2.5V, respectively. The chip size is $1465um{\times}895um$ including pads.

• Journal of IKEEE
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• v.20 no.3
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• pp.314-317
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• 2016

Recently, efforts to maximize battery life in progress with an increase in the demand for portable devices. In this paper, we propose multi-phase buck converter with fast transient response. Multi-phase buck converter may be used for the output capacitor of small size because the ripple cancellation effect, it is possible to use an inductor having an inductance less. The portable device for quick change from standby mode to active 4-phase design structure was given a fast transient response. The proposed multi-phase buck converter was fabricated using a 0.18 um CMOS process and the supply voltage ranges from 2.7V to 3.3V, the maximum load current is 500mA and settling time is 10us.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2009.10a
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• pp.319-321
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• 2009

일반적으로 가장 간단한 구조의 배터리 충전장치는 교류를 직류로 변환하기 위한 다이오드 정류기와 직류의 크기를 변환하기 위한 컨버터로 구성되어 있다. 하지만, 이러한 구조로 되어있는 충전장치의 경우 입력단 역률저하로 인하여 전력변환장치에 과도전류나 파형의 왜곡 현상 등을 초래하게 되고, 정류기와 컨버터로 구성되는 2단 전력변환구조이기 때문에 효율에도 좋지 않은 영향을 미치게 된다. 따라서 본 논문에서는 역률제어가 가능한 단일 컨버터 구조를 갖는 플러그인 하이브리드 전기자동차용 42V 배터리 충전장치를 연구하였다. 본 논문에서 연구한 배터리 충전장치는 PWM 방식의 AC-DC Buck 컨버터를 이용한 전력 변환장치와 입력단 역률제어 및 컨버터 출력을 제어하기위한 제어기로 구성되어있다. 본 논문에서 연구한 배터리 충전장치는 시뮬레이션을 통하여 역률제어 및 컨버터 출력을 확인하고 그 타당성을 검토하였다.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.6
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• pp.25-32
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• 2011

This paper proposes high efficiency current-mode DC-DC buck converter that are suitable for portable devices. The current-mode DC-DC buck converter using adjustable Dead-time control method improves the power efficiency 2~5%. The buck converter has been implemented with a standard 0.35${\mu}m$ CMOS process. The size of this chip is 0.97$mm^2$. The input range of the fabricated DC-DC buck converter is 2.5V~3.3V, and the output is 1.8V. The maximum loading current of the converter is 500mA and the peak efficiency is 93% at 200mA loads.

• Journal of IKEEE
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• v.22 no.4
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• pp.1006-1011
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• 2018

This paper proposes a three level buck converter utilizing multi-bit flying capacitor voltage control. The conventional three-level buck converter can not control the flying capacitor voltage, so that the operation is unstable or the circuit for controlling the flying capacitor voltage can not be applied to the PWM mode. Also when the load current is increased, an error occurs in the inductor voltage. The proposed structure can control the flying capacitor voltage in PWM mode by using differential difference amplifier and common mode feedback circuit. In addition, this paper proposes a 3bit flying capacitor voltage control circuit to optimize the operation of the three level buck converter depending on the load current, and a triangular wave generation circuit using the schmitt trigger circuit. The proposed 3-level buck converter is designed in $0.18{\mu}m$ CMOS process and has an input voltage range of 2.7V~3.6V and an output voltage range of 0.7V~2.4V. The operating frequency is 2MHz, the load current range is 30mA to 500mA, and the output voltage ripple is measured up to 32.5mV. The measurement results show a maximum power conversion efficiency of 85% at a load current of 130 mA.