• Transactions on Electrical and Electronic Materials
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• 제12권5호
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• pp.197-199
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• 2011

In this paper, the bottom-gate thin-film transistors (TFTs) were fabricated with an amorphous/microcrystalline Si double layer (DL) as an active layer and the variations of the electrical characteristics were investigated according to the DC bias stresses. Since the fabrication process of DL TFTs was identical to that of the conventional amorphous Si (a-Si) TFTs, it creates no additional manufacturing cost. Moreover, the amorphous/microcrystalline Si DL could possibly improve stability and mass production efficiency. Although the field effect mobility of the typical DL TFTs is similar to that of a-Si TFTs, the DL TFTs had a higher reliability with respect to the direct current (DC) bias stresses.

• Transactions on Electrical and Electronic Materials
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• 제15권6호
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• pp.328-332
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• 2014

Thin film transistors (TFTs) with an amorphous silicon zinc tin oxide (a-2SZTO) channel layer have been fabricated using an RF magnetron sputtering system. The effect of the change of excitation electron on the variation of the total interfacial trap states of a-2SZTO systems was investigated depending on sputtering power, since the interfacial state could be changed by changing sputtering power. It is well known that Si can effectively reduce the generation of the oxygen vacancies. However, The a-2SZTO systems of ZTO doped with 2 wt% Si could be degraded because the Si peripheral electron belonging to a p-orbital affects the amorphous zinc tin oxide (a-ZTO) TFTs of the s-orbital overlap structure. We fabricated amorphous 2 wt% Si-doped ZnSnO (a-2SZTO) TFTs using an RF magnetron sputtering system. The a-2SZTO TFTs show an improvement of the electrical property with increasing power. The a-2SZTO TFTs fabricated at a power of 30 W showed many of the total interfacial trap states. The a-2SZTO TFTs at a power of 30 W showed poor electrical property. However, at 50 W power, the total interfacial trap states showed improvement. In addition, the improved total interfacial states affected the thermal stress of a-2SZTO TFTs. Therefore, a-2SZTO TFTs fabricated at 50 W power showed a relatively small shift of threshold voltage. Similarly, the activation energy of a-2SZTO TFTs fabricated at 50 W power exhibits a relatively large falling rate (0.0475 eV/V) with a relatively high activation energy, which means that the a-2SZTO TFTs fabricated at 50 W power has a relatively lower trap density than other power cases. As a result, the electrical characteristics of a-2SZTO TFTs fabricated at a sputtering power of 50 W are enhanced. The TFTs fabricated by rf sputter should be carefully optimized to provide better stability for a-2SZTO in terms of the sputtering power, which is closely related to the interfacial trap states.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권2호
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• pp.1344-1347
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• 2007

We have fabricated bottom gate TFTs with active layers of amorphous/microcrystalline Si double layers (DL). Dynamic electric stresses were applied to DL TFTs and a-Si TFTs to compare their degradation characteristics. The DL TFTs were more stable under dynamic stresses than a-Si TFTs.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2008년도 International Meeting on Information Display
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• pp.1455-1458
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• 2008

Amorphous silicon (a-Si:H) thin-film transistors (TFTs) are fabricated on flexible organic polymer foil substrates. As-fabricated performance, electrical bias-stability at elevated temperatures, electrical response under mechanical flexing, and prolonged mechanical stability of the TFTs are studied. TFTs made on plastic at ultra low process temperatures of $150^{\circ}C$ show initial electrical performance like TFTs made on glass but large gate-bias stress instability. An abnormal saturation of the instability against operation temperature is observed.

• Transactions on Electrical and Electronic Materials
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• 제17권3호
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• pp.143-145
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• 2016

In order to find suitable source and drain (S/D) electrodes for amorphous InGaZnO thin film transistors (a-IGZO TFTs), the specific contact resistance of interface between the channel layers and various S/D electrodes, such as Ti/Au, a-IZO and multilayer of a-IGZO/Ag/a-IGZO, was investigated using the transmission line model. The a-IGZO TFTs with a-IGZO/Ag/a-IGZO of S/D electrodes had good performance and low contact resistance due to the homo-junction with channel layer. The stability was measured with different electrodes by a positive bias stress test. The result shows the a-IGZO TFTs with a-IGZO/Ag/a-IGZO electrodes were more stable than other devices.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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• pp.1586-1589
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• 2009

We investigated the influence of chemical compositions of gallium and indium cations on the performance of solgel derived amorphous gallium indium zinc oxide (a-GIZO) based thin-film transistors (TFTs). Systematical composition study allows us to understand the solutionprocessed a-GIZO TFTs. Understanding of the compositional influence can be utilized for tailoring the solution processed amorphous oxide TFTs for the specific applications.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권2호
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• pp.1673-1676
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• 2007

We have investigated the degradation mechanism of hydrogenated amorphous silicon (a- Si:H) thin film transistors (TFTs) The threshold voltage of driving a-Si:H TFT is shifted severely by electrical bias due to a charge trapping and defect state creation. And the short channel TFTs exhibit less threshold voltage degradation than long channel TFTs. We propose the pixel circuits employing negative bias annealing scheme in order to suppression of threshold voltage shift of a-Si:H TFT.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제43회 하계 정기 학술대회 초록집
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• pp.256-256
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• 2012

Oxide semiconductors such as zinc tin oxide (ZTO) or indium gallium zinc oxide (IGZO) have attracted a lot of research interest owing to their high potential for application as thin film transistors (TFTs) [1,2]. However, the instability of oxide TFTs remains as an obstacle to overcome for practical applications to electronic devices. Several studies have reported that the electrical characteristics of ZnO-based transistors are very sensitive to oxygen, hydrogen, and water [3,4,5]. To improve the reliability issue for the amorphous InGaZnO (a-IGZO) thin-film transistor, back channel passivation layer is essential for the long term bias stability. In this study, we investigated the instability of amorphous indium-gallium-zinc-oxide (IGZO) thin film transistors (TFTs) by the back channel contaminations. The effect of back channel contaminations (humidity or oxygen) on oxide transistor is of importance because it might affect the transistor performance. To remove this environmental condition, we performed vacuum seasoning before the deposition of hybrid passivation layer and acquired improved stability. It was found that vacuum seasoning can remove the back channel contamination if a-IGZO film. Therefore, to achieve highly stable oxide TFTs we suggest that adsorbed chemical gas molecules have to be eliminated from the back-channel prior to forming the passivation layers.

• 한국전기전자재료학회논문지
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• 제24권9호
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• pp.693-696
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• 2011

Recently, amorphous oxide semiconductors (AOSs) based thin-film transistors (TFTs) have received considerable attention for application in the next generation displays industry. The research trends of AOSs based TFTs investigation have focused on the high device performance. The electrical properties of the TFTs are influenced by trap density. In particular, the threshold voltage ($V_{th}$) and subthreshold swing (SS) essentially depend on the semiconductor/gate-insulator interface trap. In this article, we investigated the effects of Ar plasma-treated $SiO_2$ insulator on the interfacial property and the device performances of amorphous indium gallium zinc oxide (a-IGZO) TFTs. We report on the improvement in interfacial characteristics between a-IGZO channel layer and gate insulator depending on Ar power in plasma process, since the change of treatment power could result in different plasma damage on the interface.

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제48권1호
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• pp.1-11
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• 1999

Hyrdogenated amorphous silicon thin film transistors are used as a pixel switching device of TFT-LCDs and very active research works on a-Si:H TFTs are in progress. Further development of the technology based on a-Si:H TFTs depends on the increased understanding of the device physics and the ability to accurately simulate the characteristics of them. A two-dimensional device simulator based on the realistic and flexible physical models can guide the device designs and their optimizations. A non-uniform finite-difference TFT Simulation Program, TFT2DS has been developed to solve the electronic transport equations for a-Si:H TFTs. In TFT2DS, many of the simplifying assumptions are removed. The developed simulator was used to calculate the transfer and output characteristics of a-Si:H TFTs. The measured data were compared with the simulated ones for verifying the validity of TFT2DS. Also the transient behaviors of a-Si:H TFTs were calculated even if the values of the related parameters are not accurately specified.