한국정보디스플레이학회:학술대회논문집
- 2007.08b
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- Pages.1344-1347
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- 2007
Dynamic Stress Analysis of a Bottom Gate TFT Having an Active Layer of Amorphous/Microcrystalline Si Double-Layers
- Pak, Sang-Hoon (School of Electrical & Electronic Engineering, Yonsei University) ;
- Jeong, Tae-Hoon (School of Electrical & Electronic Engineering, Yonsei University) ;
- Kim, Si-Joon (School of Electrical & Electronic Engineering, Yonsei University) ;
- Kim, Hyun-Jae (School of Electrical & Electronic Engineering, Yonsei University)
- Published : 2007.08.27
Abstract
We have fabricated bottom gate TFTs with active layers of amorphous/microcrystalline Si double layers (DL). Dynamic electric stresses were applied to DL TFTs and a-Si TFTs to compare their degradation characteristics. The DL TFTs were more stable under dynamic stresses than a-Si TFTs.