• 한국결정성장학회지
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• 제10권6호
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• pp.412-417
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• 2000

High electric field stressed trap distributions were investigated in the thin silicon oxide of polycrystalline silicon gate metal oxide semiconductor capacitors. The transient currents associated with the off time of stressed voltage were used to measure the density and distribution of high voltage stress induced traps. The transient currents were due to the discharging of traps generated by high stress voltage in the silicon oxides. The trap distributions were relatively uniform near both cathode and anode interface in polycrystalline silicon gate metal oxide semiconductor devices. The stress generated trap distributions were relatively uniform the order of $10^{11}$~$10^{12}$ [states/eV/$\textrm{cm}^2$] after a stress. The trap densities at the oxide silicon interface after high stress voltages were in the $10^{10}$~$10^{13}$ [states/eV/$\textrm{cm}^2$]. It was appeared that the transient current that flowed when the stress voltages were applied to the oxide was caused by carriers tunneling through the silicon oxide by the high voltage stress generated traps.

• Journal of Korean Vacuum Science & Technology
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• 제4권3호
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• pp.73-77
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• 2000

Single crystal and polycrystalline Si thin films were doped with phosphorus by a 2-zone diffusion method to develop the low-resistivity polycrystalline Si electrode for a hemispherical grain. Solid phosphorus source was used in order to achieve uniformly and highly doped surface region of polycrystalline Si films having rough surface morphology. In case of 2-zone diffusion method, it is proved that the heavy doping near the surface area can be achieved even at a relatively low temperature. SIMS analysis revealed that phosphorus doping concentration in case of using solid P as a doping source was about 50 times as that of phosphine source at 750$^{\circ}C$. Also, ASR analysis revealed that the carrier concentration was about 50 times as that of phosphine. In order to evaluate the electrical characteristics of doped polycrystalline Si films for semiconductor devices, MOS capacitors were fabricated to measure capacitance of polycrystalline Si films. In ${\pm}$2 V measuring condition, Si films, doped with solid source, have 8% higher $C_{min}$ than that of unadditional doped Si films and 3% higher $C_{min}$ than that of Si films doped with $PH_3$ source. The leakage current of these films was a few fA/${\mu}m^2$. As a result, a 2-zone diffusion method is suggested as an effective method to achieve highly doped polycrystalline Si films even at low temperature.

• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2000년도 추계 기술심포지움 논문집
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• pp.61-64
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• 2000

IMT 2000 단말기용 2.14 GHz 대역의 저잡음 증폭기 (Low Noise Amplifier, LNA)를 MCM-C 기술을 이용하여 제작하고 그 특성을 측정하였다. 먼저 저잡음 증폭기 회로를 설계한 후, 각 소자들의 고주파 library를 이용한 회로 시뮬레이션으로과 특성을 확인하였다. 시뮬레이션 상에서 이득(Gain)은 17 dB 였으며, 잡음지수 (Noise Figure)는 1.4 dB 였다. MCM-C 저잡음 증폭기는 LTCC 기판과 전극 및 저항체의 동시소성에 의해 코일(L), 콘덴서(C), 저항(R)을 기판 내부에 넣었으며, 마이크로 스트립 라인과 SMD 부품의 실장을 위한 Pad를 최상부에 제작하였다. 기판은 총 6 층으로 구성하였으며, 내부에 포함된 수동소자는 코일 2개, 콘덴서 2개, 저항 3개 등 총 7 개 였다. 시작품의 특성 측정 결과, 2.14 GHz에서 이득은 14.7 dB 였으며, 잡음지수는 1.5 dB 정도의 값을 가졌다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2000년도 하계학술대회 논문집 C
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• pp.1868-1870
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• 2000

As a drive for an ETC (Electro-thermal Chemical) launcher, a large pulse power system of a 2.4MJ energy storage was designed, constructed and tested. The overall power system consists of eight capacitive 300kJ energy storage banks. In this paper we describe the design features, setup and operation test result of the 300kJ pulsed power module. Each capacitor bank of the 300kJ module consists of six 22kV 50kJ capacitors. A triggered vacuum switch (TVS-43) was adopted as the main pulse switch. Crowbar diode circuits, variable multi-tap inductors and energy dumping systems are connected to each high power capacitor bank via bus-bars and coaxial cables. A parallel crowbar diode stack is fabricated in coaxial structure with two series 13.5kV, 60kA avalanche diodes. The main design parameters of the 300kJ module are a maximum current of 180kA and a pulse width of 0.5 - 3ms. The electrical performances of each component and current output variations into resistive loads have been investigated.

• 한국환경보건학회지
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• 제26권2호
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• pp.97-107
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• 2000

PCBs [Polychlorinated biphenyls] are halogenated aromatic compounds with the empirical formula C12H10-nCln(n=1~10), and are a mixture of possible 209 different chlorinated congeners. PCBs were widely used as dielectric fluids for capacitors, transformers, plasticizers, lubricant inks, and paint additives. once released into the environment, PCBs persist for years because they are so resistant to degradation. In addition to their high degree of lipophilicity. In 1970s, the worldwide production of PCBs seem to be still in use. The environmental load of PCBs was prohibited since 1983 in Korea. In spite of these actions, many PCBs seem to be still in use. The environmental load of PCBs will continue to be recycled through air, land, water, and the biosphere for decades to come. This study was conducted to measure the concentrations of PCBs I the serum samples of 112 women by GC/MSD(Hewlett Packard 5897 Gas Chromatography-Mass Chromatography Detector) and CG/ECD(Hewlett Packard 5890 series-II gas chromatography-Electron capture detector, U.S.A). The main results of this study were as follows; The mean and standard deviation of serum PCBs were 3.613, 0.759 ppb, respectively and median of it was 3.828 ppb. The correlation coefficients of the concentrations of 13 PCB congeners ranged from 0.7913 to 0..9985 and were significantly correlated between each items(p=0.0001). The PCB concentrations were positively associated with age(simple linear regression; R2=0.86, =0.08023, p<0.001) and with total lipids in serums(simple linear regression; R=0.7058, =0.00486, p<0.001). The age adjusted model (Y=$\beta$0+$\beta$1age+$\beta$2X) was applied for possible predictors of PCBs levels in serum. For BMI(Body Mass Index), major residential area, and fish, meat, and dairy consumption, there was no association with PCBs levels, Also there was negative association for the number of pregnancy and lactation period with PCBs levels.

• 한국분말재료학회지
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• 제12권5호
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• pp.325-331
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• 2005

Implant prototypes with various porosities were fabricated by electro-discharge-sintering of atomized spherical Ti-6Al-4V powders. Single pulse of 0.75 to 2.0 kJ/0.7 g-powder, using 150, 300, and $450{\mu}F$ capacitors was applied to produce a fully porous and porous surfaced implant compact. The solid core formed in the center of the compact after discharge was composed of acicular ${\alpha}+{\beta}$ grains and porous layer consisted of particles connected in three dimensions by necks. The solid core and neck sizes increased with an increase in input energy and capacitance. On the other hand, pore volume decreased with increased capacitance and input energy due to the formation of solid core. Capacitance and input energy are the only controllable discharge parameters even though the heat generated during a discharge is the unique parameter that determines the porosity of compact. It is known that electro-discharge-sintering of spherical Ti-6Al-4V powders can efficiently produce fully-porous and porous surfaced Ti-6Al-4V implants with various porosities in a short time less then 400 isec by manipulating the discharging condition such as input energy and capacitance including powder size.

• 한국전기전자재료학회논문지
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• 제22권2호
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• pp.101-106
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• 2009

In this paper, Thin films of $HfO_2$/Hf were deposited on p-type wafer by Atomic Layer Deposition (ALD). We studied the electrical and material characteristics of $HfO_2$/Hf/Si MOS capacitor depending on thickness of Hf metal layer. $HfO_2$ films were deposited using TEMAH and $O_3$ at $350^{\circ}C$. Samples were then annealed using furnace heating to $500^{\circ}C$. Round-type MOS capacitors have been fabricated on Si substrates with $2000\;{\AA}$-thick Pt top electrodes. The composition rate of the dielectric material was analyzed using TEM (Transmission Electron Microscopy), XRD (X-ray Diffraction) and XPS (X-ray Photoelectron Spectroscopy). Also the capacitance-voltage (C-V), conductance-voltage (G-V), and current-voltage (I-V) characteristics were measured. We calculated the density of oxide trap charges and interface trap charges in our MOS device. At the interface between $HfO_2$ and Si, both Hf-Si and Hf-Si-O bonds were observed, instead of Si-O bond. The sandwiched Hf metal layer suppressed the growing of $SiO_x$ layer so that $HfSi_xO_y$ layer was achieved. And finally, the generation of both oxide trap charge and interface trap charge in $HfO_2$ film was reduced effectively by using Hf metal layer.

• The Korean Journal of Ceramics
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• 제6권2호
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• pp.138-142
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• 2000

Thin film $LiNbO_3$MFS (metal-ferroelectric-semiconductor) capacitor showed improved characteristics such as low interface trap density, low interaction with Si substrate, and large remanent polarization. This paper reports ferroelectric $LiNbO_3$thin films grown directly on p-type Si (100) substrates by 13.56 MHz RF magnetron sputtering system for FRAM (ferroelectric random access memory) applications. RTA (rapid thermal anneal) treatment was performed for as-deposited films in an oxygen atmosphere at $600^{\circ}C$ for 60sec. We learned from X-ray diffraction that the RTA treated films were changed from amorphous to poly-crystalline $LiNbO_3$which exhibited (012), (015), (022), and (023) plane. Low temperature film growth and post RTA treatments improved the leakage current of $LiNbO_3$films while keeping other properties almost as same as high substrate temperature grown samples. The leakage current density of $LiNbO_3$films decreased from $10^{-5}$ to $10^{-7}$A/$\textrm{cm}^2$ after RTA treatment. Breakdown electric field of the films exhibited higher than 500 kV/cm. C-V curves showed the clockwise hysteresis which represents ferroelectric switching characteristics. Calculated dielectric constant of thin film $LiNbO_3$illustrated as high as 27.9. From ferroelectric measurement, the remanent polarization and coercive field were achieved as 1.37 $\muC/\textrm{cm}^2$ and 170 kV/cm, respectively.

• JSTS:Journal of Semiconductor Technology and Science
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• 제4권4호
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• pp.300-306
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• 2004

This paper reports a novel tunable bandpass filter using two-state switched inductor with direct-contact MEMS switches for wireless LAN applications. In our filter configuration, the switched inductor is implemented to obtain more stable and much larger frequency tuning ratio compared with variable capacitor-based tunable filter. The proposed tunable filter was fabricated using a micromachining technology and electrical performances of the fabricated filter were measured. The filter consists of spiral inductors, MIM capacitors and direct-contact type MEMS switches, and its frequency tunability is achieved by changing the inductance that is induced by ON/OFF actuations of the MEMS switches. The actuation voltage of the MEMS switches was measured of 58 V, and they showed the insertion loss of 0.1 dB and isolation of 26.3 dB at 2 GHz, respectively. The measured center frequencies of the fabricated filter were 2.55 GHz and 5.1 GHz, respectively. The passband insertion loss and 3-dB bandwidth were 4.2 dB and 22.5 % at 2.55 GHz, and 5.2 dB and 23.5 % at 5.1 GHz, respectively.

• 한국통신학회논문지
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• 제28권11A호
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• pp.929-935
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• 2003

ATM 교환기 망동기용 아날로그/디지털 혼합형 ASIC을 설계 제작하였다. 이 ASIC은 상대 시스템으로부터 전송되어온 46.94 MHz의 클럭을 이용하여 234.7/46.94 MHz의 시스템용 클럭 및 77.76/19.44 MHz의 가입자용 클럭을 발생시키는 역할을 하며, 전송된 클럭의 체크 및 선택 기능도 동시에 포함한다. 효율적인 ASIC 구성을 위하여 고속 클럭 발생을 위한 2개의 아날로그 PLL 회로는 전주문 방식으로, 외부 입력 클럭 체크 및 선택을 위한 디지털 회로는 표준 셀 방식으로 설계하였다. 또한, 아날로그 부분에는 일반 CMOS 공정으로 제작 가능한 저항 및 커패시터를 사용함으로서 0.8$\mu\textrm{m}$ 디지털 CMOS 공정으로 칩을 제작 가능케 하여 제작비용도 줄였다. 제작된 칩을 측정한 결과 234.7 MHz 및 19.44 MHz의 안정된 클럭을 발생하였으며, 클럭의 실효 지터도 각각 4 ㎰ 및 17 ㎰정도로 낮게 나타났다.