• Proceedings of the Korean Vacuum Society Conference
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• 2006.08a
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• pp.142-142
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• 2006

• The Journal of the Convergence on Culture Technology
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• v.4 no.3
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• pp.287-291
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• 2018

The CNTFET, which is attracting attention as a next-generation semiconductor device, can obtain ballistic or near-ballistic transport at a lower voltage than that of conventional MOSFETs by depositing CNTs between the source and drain of the device. In order to increase the performance of the CNTFET, a large number of CNTs must be deposited at a high density in the CNTFET. Thus, various manufacturing processes to increase the density of the CNTs have been developed. Recently, the Directional Shrinking Transfer Method was developed and showed that the current density of the CNTFET device could be increased up to 150 uA/um. So, this method enhances the possibility of implementing a CNTFET-based integrated circuit. In this paper, we will discuss how to evaluate the performance of the CNTFET device compared to a MOSFET at the circuit level when the CNTFET is fabricated by the Directional Shrinkage Transfer Method.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.51 no.4
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• pp.158-163
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• 2002

The pulsed Power system has been widely used to many applications, such as E/P(Electrostatic Precipitator), DeNOx/DeSOx power system, often generator, etc. In this paper, we study EMTP analysis and characteristics of critical voltage and load in impedance on various electrode length of pulse corona. To obtain a stable pulse voltage, we designed a compact pulse generator switched MOSFET and tested their characteristics by adjusting electrode length and pulse repetition. As a re sult, critical voltage of pulse corona and load impedance on increasing electrode length were decreased. These results indicate we can control critical voltage of pulse corona and suppress arc discharging between two electrodes.

• Proceeding of EDISON Challenge
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• 2016.03a
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• pp.357-361
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• 2016

Si와 InAs 두 가지 채널 물질을 가지고 3가지 수송 방향 <100>, <110>, <111>으로 변화시키며 각각의 Nanowire nMOSFETs을 가지고 ballistic quantum transport simulation을 진행하였다. 각각의 경우에 대해 E-k curve를 구한 다음에 band curvature로 캐리어의 유효질량을 계산하고, 이를 통해 MOSFET의 전류 세기를 결정짓는 DOS와 carrier injection velocity를 구하여 어떤 경우에 가장 높은 ON-current를 흐르게 하는지 확인해 보았다. 하지만 예상과 달리 나노와이어의 직경이 1.4nm으로 매우 작기 때문에 valley-splitting이 일어나 Si<110>의 경우에 가장 작은 캐리어 유효 질량을 갖고 있는 사실을 확인할 수 있었다. 결론적으로 Si<100>의 경우에 trade-off 관계에 있는 DOS와 carrier injection velocity가 6가지 경우 중 최적의 조합을 가짐으로써 가장 높은 ON-current를 흐르게 하였다.

• Journal of the Korea Society for Simulation
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• v.11 no.1
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• pp.23-30
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• 2002

An STI(Shallow Trench Isolation) by using a CMP(Chemical Mechanical Polishing) process has been one of the key issues in the device isolation[1] In this paper we fabricated N, P-MOSFEET tall analyse hump characteristics in various rounding oxdation thickness(ex : Skip, 500, 800, 1000$\AA$). As a result we found that hump occurred at STI channel edge region by field oxide recess. and boron segregation(early turn on due to boron segregatiorn at channel edge). Therefore we improved that hump occurrence by increased oxidation thickness, and control field oxide recess( 20nm), wet oxidation etch time(19HF,30sec), STI nitride wet cleaning time(99HF, 60sec+P 90min) and fate pre-oxidation cleaning time (U10min+19HF, 60sec) to prevent hump occurring at STI channel edge.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.317-318
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• 2012

현재의 반도체 산업에서 Hafnium oxide와 Hafnium silicates같은 high-k 물질은 CMOS gate와 DRAM capacitor dielectrics로 사용하기 위한 대표적인 물질에 속한다. MOSFET (metal oxide semiconductor field effect transistor)구조에서 gate length는 16 nm 이하로 계속 미세화가 연구 중이고, 또한 gate는 기존구조에서 Multi-gate구조로 다변화가 일어나고 있다. 이를 통해 게이트 절연막은 그 구조와 활용범위가 다양해지게 될 것이다. 동시에 leakage current와 dielectric break-down을 감소시키는 연구가 중요해지고 있다. 그러나 나노 영역에서의 기계적 특성에 대한 연구는 전무한 상태이다. 따라서 복잡한 회로 공정, 다양한 Multi-gate 구조, 신뢰도의 향상을 위해서는 유전박막 물질자체와 계면에서의 물리적, 기계적인 특징의 측정이 상당히 중요해지고 있다. 이에 본 연구는 Nano-indenter의 통해 경도(Hardness)와 탄성계수(Elastic modulus) 등의 측정을 통하여 시료 표면의 나노영역에서의 기계적 특성을 연구하고자 하였다. $HfO_2$게이트 절연막은 rf magnetron sputter를 이용해 Si (silicon) (100)기판위에 박막형태로 증착하였고, 이후 furnace에서 질소분위기로 온도(400, 450, $500^{\circ}C$)를 달리하여 20분 열처리를 하였다. 또한 Weibull distribution을 이용해 박막의 characteristic value를 계산하였으며, 실험결과 열처리 온도가 $400^{\circ}C$에서 $500^{\circ}C$로 증가함에 따라 경도와 탄성계수는 7.4 GPa에서 10.65 GPa으로 120.25 GPa에서 137.95 GPa으로 각각 증가하였다. 이는 재료적 측면으로 재료의 구조적 우수성이 증가된 것으로 판단된다.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.28 no.6
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• pp.403-407
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• 2015

Generally, MWCNT, with thermal, chemical and electrical superiority, is manufactured with CVD (chemical vapor deposition). Using MWCNT, it is comonly used as gas sensor of MOS-FET structure. In this study, in order to repeatedly detect gases, the author had to effectively eliminate gases absorbed in a MWCNT sensor. So as to eliminate gases absorbed in a MWCNT sensor, the sensor was applied heat of 423[K], and in order to observe how the applied heat was diffused within the sensor, the author interpreted the diffusion process of heat, using COMSOL interpretation program. In order to interpret the diffusion process of heat, the author progressed modeling with the structure of MWCNT gas sensor in 2-dimension, and defining heat transfer velocity($u={\Delta}T/{\Delta}x$), accorded to governing equation within the sensor, the author proposed heat transfer mechanism.

• Proceedings of the KIEE Conference
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• 1991.07a
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• pp.531-536
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• 1991

This paper describes a POWER MOSFET inverter suitable for medium frequency induction heating applications. A series scheme is employed, which is operated at zero phase of the resonant load by PLL control. This ensures maximum power transfer, good efficiency, low EMI noise and reliable operation. Circuit configuration and performance are discussed and design criteria are given. Implementation of a prototype rated at 5KW, $100{\sim}300KHz$ is discribed and experimental results are given.

• Proceedings of the KIEE Conference
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• 2002.07c
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• pp.1850-1852
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• 2002

In this paper, we studies EMTP analysis and characteristics of critical voltage of pulse corona and load impedance on variable electrode length. To obtain a stable Pulse voltage, we designed a compact pulse generator switched MOSFET and tested their characteristics by adjusting electrode length and pulse repetition. As a result, critical voltage of pulse corona and load impedance on increasing electrode length were decreased. These results indicate we can control critical voltage of pulse corona and suppress arc discharging between two electrodes.

• Proceedings of the Korea Information Processing Society Conference
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• 2002.04a
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• pp.631-634
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• 2002

In this paper we improved that hump occurrence by increased oxidation thickness, and control field oxide recess$(\leq20nm)$, wet oxidation etch time(19HF, 30sec), STI nitride wet cleaning time(99 HF, 60sec + P 90min) and gate pre-oxidation cleaning time(U10min+19HF, 60sec) to prevent hump occurring at STI channel edge.