• Title/Summary/Keyword: U-MOSFET

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50V Power MOSFET with Improved Reverse Recovery Characteristics Using an Integrated Schottky Body Diode (Schottky Body Diode를 집적하여 향상된 Reverse Recovery 특성을 가지는 50V Power MOSFET)

  • Lee, Byung-Hwa;Cho, Doo-Hyung;Kim, Kwang-Soo
    • Journal of IKEEE
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    • v.19 no.1
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    • pp.94-100
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    • 2015
  • In this paper, 50V power U-MOSFET which replace the body(PN) diode with Schottky is proposed. As already known, Schottky diode has the advantage of reduced reverse recovery loss than PN diode. Thus, the power MOSFET with integrated Schottky integrated can minimize the reverse recovery loss. The proposed Schottky body diode U-MOSFET(SU-MOS) shows reduction of reverse recovery loss with the same transfer, output characteristic and breakdown voltage. As a result, 21.09% reduction in peak reverse current, 7.68% reduction in reverse recovery time and 35% improvement in figure of merit(FOM) are observed when the Schottky width is $0.2{\mu}m$ and the Schottky barrier height is 0.8eV compared to conventional U-MOSFET(CU-MOS). The device characteristics are analyzed through the Synopsys Sentaurus TCAD tool.

The analysis on the Pulsed radiation effect for semiconductor unit devices (반도체 단위소자의 펄스방사선 영향분석)

  • Jeong, Sang-hun;Lee, Nam-ho;Lee, Min-woong
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2016.05a
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    • pp.775-777
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    • 2016
  • In this paper presents an analysis of pulsed radiation effects of unit devices. Unit devices are the nMOSFET, pMOSFET, NPN Transistor and those fabricated by the 0.18um CMOS process. Pulsed radiation test results in nMOSFET, the photocurrent of tens nA was generated in $2.07{\times}10^8rad(si)/s$. For the pMOSFET, a photocurrent generation was not observed in $3{\times}10^8rad(si)/s$. For the NPN transistor, the photocurrent was generated with about 1uA. Therefore, the MOSFET must be used than BJT transistor when radhard IC design.

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Schottky Barrier Field-Effect Transistor의 소자의 특성 및 성능 비교분석

  • Kim, Gyeong-Tae;Park, Hyeok-Jun;U, Ji-Yun;Park, Yeong-Min
    • Proceeding of EDISON Challenge
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    • 2017.03a
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    • pp.372-375
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    • 2017
  • Metal-oxide-semiconductor Field-Effect transistor (MOSFET)을 대체할 기술로서 제안된 Schottky Barrier MOSFET (SB-MOSFET)가 제시되고 있다. 본 연구에서는 SB-MOSFET와 MOSFET을 다양한 소자 파라미터를 변화시킴으로서 양자역학적 전하수송 계산을 바탕으로 특성을 분석한다. MOSFET과 SB-MOSFET은 채널 두께 ($T_{Si}$)가 감소함에 따라 전류량은 증가하고 SS와 DIBL은 증가하였고 Overlap에서는 SS와 DIBL이 커지고 Underlap에서는 작아짐을 보였고 SB-MOSFET는 특히 그 폭이 컸다. 또한 SB 높이가 낮을수록 SB-MOSFET의 전류량이 증가하고 SS는 감소하였고 마찬가지로 Source와 Drain doping concentration이 낮을수록 MOSFET의 전류량은 증가하고 SS는 감소하였다. MOSFET과 SB-MOSFET의 경향은 대체로 비슷하나 변화량의 차이 등이 있었다.

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A study on the pinch-off characteristics for Double Cate MOSFET in nuo structure (나노 구조 Double Gate MOSFET의 핀치오프특성에 관한 연구)

  • 고석웅;정학기
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.6 no.7
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    • pp.1074-1078
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    • 2002
  • In this paper, we designed double gate(DG) MOSFET structure which has main gate(MG) and two side gates(SG). We have simulated using TCAD simulator U .WOSFET have the main gate length of %m and the side gate length of 70nm. Then, u'e have investigated the pinch-off characteristics, drain voltage is changed from 0V to 1.5V at VMG=1.5V and VSG=3.0V. In spite of the LMG is very small, we have obtained a very good pinch-off characteristics. Therefore, we know that the DG structure is very useful at nano scale.

Analysis of $f_T$ and $f_{max}$ Dependence on Unit Gate Finger Width for RF Performance Optimization of MOSFETs (MOSFET의 RF 성능 최적화를 위한 단위 게이트 Finger 폭에 대한 $f_T$$f_{max}$의 종속데이터 분석)

  • Cha, Ji-Yong;Cha, Jun-Young;Jung, Dae-Hyoun;Lee, Seong-Hearn
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.9
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    • pp.21-25
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    • 2008
  • In this study, to maximize RF performance of MOSFETs, $f_T$ and $f_{max}$ dependent data on $W_u$ are measured and newly analyzed by extracting small-signal model parameters. From the physical analysis results, it is found that a peak value of $f_T$ is generated by $W_u$-independent parasitic gate-bulk capacitance at narrow $W_u$ and the wide width effect of reducing the increasing rate of transconductance at wide $W_u$. In addition, it is revealed that a maximum value of $f_{max}$ is caused by the non-quasi-static effect that the gate resistance is greatly reduced at narrow $W_u$ and becomes constant at wide $W_u$.

Electrical characterization of 4H-SiC MOSFET with aluminum gate according to design parameters (Aluminium Gate를 적용한 4H-SiC MOSFET의 Design parameter에 따른 전기적 특성 분석)

  • Seung-Hwan Baek;Jeong-Min Lee;U-yeol Seo;Yong-Seo Koo
    • Journal of IKEEE
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    • v.27 no.4
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    • pp.630-635
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    • 2023
  • SiC is replacing the position of silicon in the power semiconductor field due to its superior resistance to adverse conditions such as high temperature and high voltage compared to silicon, which occupies the majority of existing industrial fields. In this paper, the gate of 4H-SiC Planar MOSFET, one of the power semiconductor devices, was formed with aluminium to make the contrast and parameter values consistent with polycrystalline Si gate, and the threshold voltage, breakdown voltage, and IV characteristics were studied by varying the channel doping concentration of SiC MOSFET.

The RF performance degradation in Bulk DTMOS due to Hot Carrier effect (Hot Carrier 현상에 의한 Bulk DTMOS의 RF성능 저하)

  • Park Jang-Woo;Lee Byoung-Jin;Yu Jong-Gun;Park Jong-Tae
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.2 s.332
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    • pp.9-14
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    • 2005
  • This paper reports the hot carrier induced RF performance degradation of bulk dynamic threshold voltage MOSFET (B-DTMOS) compared with bulk MOSFET (B-MOS). In the normal and moderate mode operations, the degradations of cut-off frequency $(f_{T})$ and minimum noise figure $(F_{min})$ of B-DTMOS are less significant than those of B-MOS devices. Our experimental results show that the RF performance degradation is more significant than the U performance degradation after hot carrier stressing. Also, the degradation characteristics of RF power Performance of B-DTMOS due to hot carrier effects are measured for the first time.

Scaling theory to minimize the roll-off of threshold voltage for nano scale MOSFET (나노 구조 MOSFET의 문턱전압 변화를 최소화하기 위한 스케일링 이론)

  • 김영동;김재홍;정학기
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2002.11a
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    • pp.494-497
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    • 2002
  • In this paper, we have presented the simulation results about threshold voltage of nano scale lightly doped drain (LDD) MOSFET with halo doping profile. Device size is scaled down from 100nm to 40nm using generalized scaling. We have investigated the threshold voltage for constant field scaling and constant voltage scaling using the Van Dort Quantum Correction Model(QM) and direct tunneling current for each gate oxide thickness. We know that threshold voltage is decreasing in the constant field scaling and increasing in the constant voltage scaling when gate length is reducing, and direct tunneling current is increasing when gate oxide thickness is reducing. To minimize the roll-off characteristics for threshold voltage of MOSFET with decreasing channel length, we know u value must be nearly 1 in the generalized scaling.

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Study of AC/DC Resonant Pulse Converter for Energy Harvesting (에너지 획득을 위한 AC/DC 공진형 펄스 컨버터의 연구)

  • Ngo Khai D.T.;Chung Gyo-Bum
    • The Transactions of the Korean Institute of Power Electronics
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    • v.10 no.3
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    • pp.274-281
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    • 2005
  • A new resonant pulse converter for energy harvesting is proposed. The converter transfers energy from a low-voltage AC current to a battery. The low-voltage AC current source is an equivalent of the piezoelectric generator, which converts the mechanical energy to the electric energy. The converter consists of a full-bridge rectifier having four N-type MOSFETs and a boost converter haying N-type MOSFET and P-type MOSFET instead of diode. Switching of MOSFETs utilizes the capability of the $3^{rd}$ regional operation. The operational principles and switching method for the power control of the converter are investigated with the consideration of effects of the parasitic capacitances of MOSFETs. Simulation and experiment are performed to prove the analysis of the converter operation and to show the possibility of the $\mu$W energy harvesting.