• Title/Summary/Keyword: MOS devices

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Experimental fabrication and analysis on the double injection semiconductor switching devices (반도체 DI swiching 소자의 시작과 특성에 관한 실험적 고찰)

  • 성만영;정세진;임경문
    • Electrical & Electronic Materials
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    • v.4 no.2
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    • pp.159-174
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    • 1991
  • 이중주입효과에 의한 고내압 반도체 스위칭소자의 설계 제작에 촛점을 맞추어 Injection Gate구조와 MOS Gate 구조로 시료소자를 제작해 그 특성을 검토하고 Electrical Switching 및 Oxide막에서의 Breakdown현상에 의한 문제점을 해결해 보고자 Optical Gate구조를 제안하여 이 optically Gated Semiconductor Switching 소자의 동작특성을 연구하고 Injection Gate 구조를 제안하여 이 optically Gated Semiconductor Switching 소자의 동작특성을 연구하고 Injection Gate 및 MOS Gate 구조(Planar type, V-Groove type, Injection Gate mode, Optical Gate mode)로 설계제작된 소자와 특성을 비교 분석하였다.

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A $32{\times}33$ Photo-elements MOS Image Sensor

  • Park, Sang-Sik;Park, Jeong-Ok;Lee, Jong-Duk
    • Proceedings of the KIEE Conference
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    • 1987.07a
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    • pp.411-415
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    • 1987
  • A $32{\times}33$ MOS-type area image sensor has been fabricated. The blooming current is reduced to 1/14 by forming +p photocell in P-well instead of a simple p-type substrate. A shallow n+ junction is made to improve the sensitivity of photodiode on short wavelength. Bootstrapping circuit technique is applied to obtain high speed dynamic shift register. The shift register operates at up to 10MHz for 7V clock.

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Dielectric property and conduction mechanism of ultrathin zirconium oxide films

  • Chang, J.P.;Lin, Y.S.
    • Electrical & Electronic Materials
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    • v.16 no.9
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    • pp.61.1-61
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    • 2003
  • Stoichiometric, uniform, amorphous ZrO$_2$ films with an equivalent oxide thickness of ∼1.5nm and a dielectric constant of ∼18 were deposited by an atomic layer controlled deposition process on silicon for potential application in meta-oxide-semiconductor(MOS) devices. The conduction mechanism is identified as Schottky emission at low electric fields and as Poole-Frenkel emission at high electric fields. the MOS devices showed low leakage current, small hysteresis(〈50mV), and low interface state density(∼2*10e11/cm2eV). Microdiffraction and high-resolution transmission electron microscopy showed a localized monoclinic phase of ${\alpha}$-ZrO$_2$ and an amorphous interfacial ZrSi$\_$x/O$\_$y/ layer which has a correspondign dielectric constant of 11

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Electrical properties variations of nitrided, reoxided MOS devices by nitridation condition (질화와 재산화 조건에 따른 모스 소자의 전기적 특성변화)

  • 이정석;이용재
    • Proceedings of the IEEK Conference
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    • 1998.06a
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    • pp.343-346
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    • 1998
  • Ultra-thin gate oxide in MOS devices are subjected to high-field stress during device operation, which degrades the oxide and exentually causes dielectric breakdown. In this paper, we investigate the electrical properties of ultra-thin nitrided oxide (NO) and reoxidized nitrided oxide(ONO) films that are considered to be promising candidates for replacing conventional silicon dioxide film in ULSI level integration. We study vriations of I-V characteristics due to F-N tunneling, and time-dependent dielectric breakdown (TDDB) of thin layer NO and ONO depending on nitridation and reoxidation condition, and compare with thermal $SiO_{2}$. From the measurement results, we find that these NO and ONO thin films are strongly depending on its condition and that optimized reoxided nitrided oxides (ONO) films show superior dielectric characteristics, and breakdown-to-change ( $Q_{bd}$ ) performance over the NO films, while maintaining a similar electric field dependence compared to NO layer.

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Temperature Characteristics of Thermally Nitrided, Reoxidized MOS devices (열적으로 질화, 재산화된 모스 소자의 온도특성)

  • 이정석;장창덕;이용재
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 1998.11a
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    • pp.165-168
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    • 1998
  • Re-oxidized nitrided oxides which have been investigated as alternative gate oxide for Metal- Oxide -Semiconductor field effect devices were grown by conventional furnace process using pure NH$_3$ and dry $O_2$ gas, and were characterized via a Fowler-Nordheim Tunneling electron injection technique. We studied Ig-Vg characteristics, leakage current, $\Delta$Vg under constant current stress from electrical characteristics point of view and TDDB from reliability point of view of MOS capacitors with SiO$_2$, NO, ONO dielectrics. Also, we studied the effect of stress temperature (25, 50, 75, 100, and 1$25^{\circ}C$). Overall, our results indicate that optimized re-oxidized nitrided oxide shows improved Ig-Vg characteristics, leakage current over the nitrided oxide and SiO$_2$. It has also been shown that re-oxidized nitrided oxide have better TDDB performance than SiO$_2$ while maintaining a similar temperature and electric field dependence. Especially, the Qbd is increased by about 1.5 times.

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Trends of Power Semiconductor Device (전력 반도체의 개발 동향)

  • Yun, Chong-Man
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2004.11a
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    • pp.3-6
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    • 2004
  • Power semiconductor devices are being compact, high performance and intelligent thanks to recent remarkable developments of silicon design, process and related packaging technologies. Developments of MOS-gate transistors such as MOSFET and IGBT are dominant thanks to their advantages on high speed operation. In conjunction with package technology, silicon technologies such as trench, charge balance and NPT will support future power semiconductors. In addition, wide band gap material such as SiC and GaN are being studies for next generation power semiconductor devices.

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High Temperature Characteristics of SOI BMFET (SOI BMFET 의 고온 특성 분석)

  • Lim, Moo-Sup;Kim, Seoung-Dong;Han, Min-Koo;Choi, Yearn-Ik
    • Proceedings of the KIEE Conference
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    • 1996.07c
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    • pp.1579-1581
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    • 1996
  • The high temperature characteristics of SOI BMFET are analyzed by the numerical simulation and compared with MOS-gated SOI power devices at high temperatures. The proposed SOI BMFET combines bipolar operation in the on-state with unipolar FET operation in the off-state, so that it may be suitable for high temperature operation without any significant degradation of performance such as the leakage current and blocking capability. The simulation results show that SOI BMFET with a higher doped n-resurf layer is the most promising device far high temperature application as compared with MOS-gated SOI power devices, exhibiting the low on-state voltage drop as well as the excellent forward blocking capability at high temperature.

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PERFORMANCE EVALUATIONS OF ADVANCED GENERATION IGBTS AND MCT IN SINGLE-ENDED RESONANT INVERTER

  • Ishimaru, N.;Fujita, A.;Hirota, I.;Yamashita, H.;Omori, H.;Nakamizo, Tetsuo;Shirakawa, S.;Nakaoka, Mutsuo.
    • Proceedings of the KIPE Conference
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    • 1998.10a
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    • pp.851-854
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    • 1998
  • In recent years, a cost-effective voltage-source type single-ended resonant-load inverter using MOS gate power switching devices and its related resonant inverter topologies have been commonly used for induction-heated cooking appliances because of relatively-lowered switching losses, simple circuit topology, low cost, compactness and low harmonic current in utility AC side. This paper present some comparative performance evaluations of IGBTs as sample devices in each generation and MOS controlled Thyristor(MCT) incorporated into the voltage-source type single-ended load resonant inverter for induction-heating rice cookers used for consumer power electronic applications, in which the output power can be regulated on the basis of Frequency Modulation Scheme.

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Graphene Transistor Modeling Using MOS Model (MOS 모델을 이용한 그래핀 트랜지스터 모델링)

  • Lim, Eun-Jae;Kim, Hyeongkeun;Yang, Woo Seok;Yoo, Chan-Sei
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.26 no.9
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    • pp.837-840
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    • 2015
  • Graphene is a single layer of carbon material which shows very high electron mobility, so many kinds of research on the devices using graphene layer have been performed so far. Graphene material is adequate for high frequency and fast operation devices due to its higher mobility. In this research, the actual graphene layer is evaluated using RT-CVD method which can be available for mass production. The mobility of $7,800cm^2/Vs$ was extracted, that is more than 7 times of that in silicon substrate. The graphene transistor model having no band gap is evaluated using both of pMOS and nMOS based on the measured mobility values. And then the response of graphene transistor model regarding to gate length and width is examined.

Integration of 5-V CMOS and High-Voltage Devices for Display Driver Applications

  • Kim, Jung-Dae;Park, Mun-Yang;Kang, Jin-Yeong;Lee, Sang-Yong;Koo, Jin-Gun;Nam, Kee-Soo
    • ETRI Journal
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    • v.20 no.1
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    • pp.37-45
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    • 1998
  • Reduced surface field lateral double-diffused MOS transistor for the driving circuits of plasma display panel and field emission display in the 120V region have been integrated for the first time into a low-voltage $1.2{\mu}m$ analog CMOS process using p-type bulk silicon. This method of integration provides an excellent way of achieving both high power and low voltage functions on the same chip; it reduces the number of mask layers double-diffused MOS transistor with a drift length of $6.0{\mu}m$ and a breakdown voltage greater than 150V was self-isolated to the low voltage CMOS ICs. The measured specific on-resistance of the lateral double-diffused MOS in $4.8m{\Omega}{\cdot}cm^2$ at a gate voltage of 5V.

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