• Title/Summary/Keyword: Interface Trap density

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Improved Dit between ALD HfAlO Dielectric and InGaAs Substrate Using NH3 Plasma Passivation (InGaAs 위의 NH3 Plasma Passivation을 이용한 ALD HfAlO유전체 계면전하(Dit) 향상)

  • Choi, Jae Sung
    • Journal of the Semiconductor & Display Technology
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    • v.17 no.4
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    • pp.27-31
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    • 2018
  • The effect of $NH_3$ plasma passivation on the chemical and electrical characteristics of ALD HfAlO dielectric on the InGaAs substrate was investigated. The results show that $NH_3$ plasma passivation exhibit better electrical & chemical performance such as much lower leakage current, lower density of interface trap(Dit) level, and low unstable interfacial oxide. $NH_3$ plasma passivation can effectively enhance interfacial characteristics. Therefore $NH_3$ plasma passivation improved the HfAlO dielectric performance on the InGaAs substrate.

Experiments & numerical analysis of charge accumulation and flat band voltage shifts in irradiated MIS capacitor (放射線이 照射된 MIS capacitor의 電荷 蓄積 및 flat band 전압 이동에 대한 實驗 및 數値的 硏究)

  • 황금주;김홍배;손상희
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.44 no.4
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    • pp.483-489
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    • 1995
  • To investigate the mechanism generated by irradiation in the insulator layer irradiated MIS (Metal - Insulator - Semiconductor) device, the various types of MIS capacitors depending on insulator thickness, insulator types and implanted impurities are fabricated on the P-type wafer. MIS capacitors exposed by 1Mrad Co$^{60}$ .gamma.-ray are measured for flat band voltage and charge density shifts pre- and post-irradiation. The measuring results of post-irradiation show the flat band voltage shifting toward negative direction and charge density increasing regardless of parameters. This results have a good agreement with calculated data by computer simulation. Si$_{3}$N$_{4}$ layers have a good radiation-hardness than SiO$_{2}$ layers compared to the results of post-irradiation. Also, radiation-induced negative trap is discovered in the implanted insulator layer. Using numerical analysis, four continuty equations (conduction-band electrons continuity equation, valence-band holes continuity equation, trapped electrons continuity equation, trapped holes continuity equation) are solved and charge distributions according to the distance and Si-Insulator interface states are investigated.

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Performance Improvement of All Solution Processable Organic Thin Film Transistors by Newly Approached High Vacuum Seasoning

  • Kim, Dong-Woo;Kim, Hyoung-Jin;Lee, Young-Uk;Hong, Mun-Pyo
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.02a
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    • pp.470-470
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    • 2012
  • Organic thin film transistors (OTFTs) backplane constitute the active elements in new generations of plastic electronic devices for flexible display. The overall OTFTs performance is largely depended on the properties and quality of each layers of device material. In solution based process of organic semiconductors (OSCs), the interface state is most impediments to preferable performance. Generally, a threshold voltage (Vth) shift is usually exhibited when organic gate insulators (OGIs) are exposed in an ambient air condition. This phenomenon was caused by the absorbed polar components (i.e. oxygen and moisture) on the interface between OGIs and Soluble OSCs during the jetting process. For eliminating the polar component at the interface of OGI, the role of high vacuum seasoning on an OGI for all solution processable OTFTs were studied. Poly 4-vinly phenols (PVPs) were the material chosen as the organic gate dielectric, with a weakness in ambient air. The high vacuum seasoning of PVP's surface showed improved performance from non-seasoning TFT; a $V_{th}$, a ${\mu}_{fe}$ and a interface charge trap density from -8V, $0.018cm^2V^{-1}s^{-1}$, $1.12{\times}10^{-12}(cm^2eV)^{-1}$ to -4.02 V, $0.021cm^2V^{-1}s^{-1}$, $6.62{\times}10^{-11}(cm^2eV)^{-1}$. These results of OTFT device show that polar components were well eliminated by the high vacuum seasoning processes.

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Comparative Investigation of Interfacial Characteristics between HfO2/Al2O3 and Al2O3/HfO2 Dielectrics on AlN/p-Ge Structure

  • Kim, Hogyoung;Yun, Hee Ju;Choi, Seok;Choi, Byung Joon
    • Korean Journal of Materials Research
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    • v.29 no.8
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    • pp.463-468
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    • 2019
  • The electrical and interfacial properties of $HfO_2/Al_2O_3$ and $Al_2O_3/HfO_2$ dielectrics on AlN/p-Ge interface prepared by thermal atomic layer deposition are investigated by capacitance-voltage(C-V) and current-voltage(I-V) measurements. In the C-V measurements, humps related to mid-gap states are observed when the ac frequency is below 100 kHz, revealing lower mid-gap states for the $HfO_2/Al_2O_3$ sample. Higher frequency dispersion in the inversion region is observed for the $Al_2O_3/HfO_2$ sample, indicating the presence of slow interface states A higher interface trap density calculated from the high-low frequency method is observed for the $Al_2O_3/HfO_2$ sample. The parallel conductance method, applied to the accumulation region, shows border traps at 0.3~0.32 eV for the $Al_2O_3/HfO_2$ sample, which are not observed for the $Al_2O_3/HfO_2$ sample. I-V measurements show a reduction of leakage current of about three orders of magnitude for the $HfO_2/Al_2O_3$ sample. Using the Fowler-Nordheim emission, the barrier height is calculated and found to be about 1.08 eV for the $HfO_2/Al_2O_3$ sample. Based on these results, it is suggested that $HfO_2/Al_2O_3$ is a better dielectric stack than $Al_2O_3/HfO_2$ on AlN/p-Ge interface.

Irreversible Charge Trapping at the Semiconductor/Polymer Interface of Organic Field-Effect Transistors (유기전계효과 트랜지스터의 반도체/고분자절연체 계면에 발생하는 비가역적 전하트래핑에 관한 연구)

  • Im, Jaemin;Choi, Hyun Ho
    • Journal of Adhesion and Interface
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    • v.21 no.4
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    • pp.129-134
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    • 2020
  • Understanding charge trapping at the interface between conjugated semiconductor and polymer dielectric basically gives insight into the development of long-term stable organic field-effect transistors (OFET). Here, the charge transport properties of OFETs using polymer dielectric with various molecular weights (MWs) have been investigated. The conjugated semiconductor, pentacene exhibited morphology and crystallinity, insensitive to MWs of polymethyl methacrylate (PMMA) dielectric. Consequently, transfer curves and field-effect mobilities of as-prepared devices are independent of MWs. Under bias stress in humid environment, however, the drain current decay as well as transfer curve shift are found to increase as the MW of PMMA decreases (MW effect). The charge trapping induced by MW effect is irreversible, that is, the localized charges are difficult to be delocalized. The MW effect is caused by the variation in the density of polymer chain ends in the PMMA: the free volumes at the PMMA chain ends act as charge trap sites, corresponding to drain current decay depending on MWs of PMMA.

Decrease of Interface Trap Density of Deposited Tunneling Layer Using CO2 Gas and Characteristics of Non-volatile Memory for Low Power Consumption (CO2가스를 이용하여 증착된 터널층의 계면포획밀도의 감소와 이를 적용한 저전력비휘발성 메모리 특성)

  • Lee, Sojin;Jang, Kyungsoo;Nguyen, Cam Phu Thi;Kim, Taeyong;Yi, Junsin
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.29 no.7
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    • pp.394-399
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    • 2016
  • The silicon dioxide ($SiO_2$) was deposited using various gas as oxygen and nitrous oxide ($N_2O$) in nowadays. In order to improve electrical characteristics and the interface state density ($D_{it}$) in low temperature, It was deposited with carbon dioxide ($CO_2$) and silane ($SiH_4$) gas by inductively coupled plasma chemical vapor deposition (ICP-CVD). Each $D_{it}$ of $SiO_2$ using $CO_2$ and $N_2O$ gas was $1.30{\times}10^{10}cm^{-2}{\cdot}eV^{-1}$ and $3.31{\times}10^{10}cm^{-2}{\cdot}eV^{-1}$. It showed $SiO_2$ using $CO_2$ gas was about 2.55 times better than $N_2O$ gas. After 10 years when the thin film was applied to metal/insulator/semiconductor(MIS)-nonvolatile memory(NVM), MIS NVM using $SiO_2$($CO_2$) on tunneling layer had window memory of 2.16 V with 60% retention at bias voltage from +16 V to -19 V. However, MIS NVM applied $SiO_2$($N_2O$) to tunneling layer had 2.48 V with 61% retention at bias voltage from +20 V to -24 V. The results show $SiO_2$ using $CO_2$ decrease the $D_{it}$ and it improves the operating voltage.

A Study on the Characteristic of MOS structure using $HfO_{2}$ as high-k gate dielectric film ($HfO_{2}$를 이용한 MOS 구조의 제작 및 특성)

  • Park, C.I.;Youm, M.S.;Park, J.W.;Kim, J.W.;Sung, M.Y.
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2002.11a
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    • pp.163-166
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    • 2002
  • We investigated structural and electrical properties of Metal-Oxide-Semiconductor(MOS) structure using Hafnium $oxide(HfO_{2})$ as high-k gate dielectric material. $HfO_{2}$ films are ultrathin gate dielectric material witch have a thickness less than 2.0nm, so it is spotlighted to be substituted $SiO_{2}$ as gate dielectric material. In this paper We have grown $HfO_{2}$ films with pt electrode on P-type Silicon substrate by RF magnetron sputtering system using $HfO_{2}$ target and oserved the property of semiconductor-oxide interface. Using pt electrode, it is necessary to be annealed at ${300^{\circ}C}$. This process is to increase an adhesion ratio between $HfO_{2}$ films with pt electrode. In film deposition process, the deposition time of $HfO_{2}$ films is an important parameter. Structura1 properties are invetigated by AES depth profile, and electrical properties by Capacitance-Voltage characteristic. Interface trap density are measured to observe the interface between $HfO_{2}$ with Si using High-frequency(1MHz) C-V and Quasi - static C-V characteristic.

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The Electrical Properties of Post-Annealing in Neutron-Irradiated 4H-SiC MOSFETs (중성자 조사한 4H-SiC MOSFET의 열처리에 의한 전기적 특성 변화)

  • Lee, Taeseop;An, Jae-In;Kim, So-Mang;Park, Sung-Joon;Cho, Seulki;Choo, Kee-Nam;Cho, Man-Soon;Koo, Sang-Mo
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.31 no.4
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    • pp.198-202
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    • 2018
  • In this work, we have investigated the effect of a 30-min thermal anneal at $550^{\circ}C$ on the electrical characteristics of neutron-irradiated 4H-SiC MOSFETs. Thermal annealing can recover the on/off characteristics of neutron-irradiated 4H-SiC MOSFETs. After thermal annealing, the interface-trap density decreased and the effective mobility increased in terms of the on-characteristics. This finding could be due to the improvement of the interfacial state from thermal annealing and the reduction in Coulomb scattering due to the reduction in interface traps. Additionally, in terms of the off-characteristics, the thermal annealing resulted in the recovery of the breakdown voltage and leakage current. After the thermal annealing, the number of positive trapped charges at the MOSFET interface was decreased.

Characterization of the Schottky Barrier Height of the Pt/HfO2/p-type Si MIS Capacitor by Internal Photoemission Spectroscopy (내부 광전자방출 분광법을 이용한 Pt/HfO2/p-Si Metal-Insulator-Semiconductor 커패시터의 쇼트키 배리어 분석)

  • Lee, Sang Yeon;Seo, Hyungtak
    • Korean Journal of Materials Research
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    • v.27 no.1
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    • pp.48-52
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    • 2017
  • In this study, we used I-V spectroscopy, photoconductivity (PC) yield and internal photoemission (IPE) yield using IPE spectroscopy to characterize the Schottky barrier heights (SBH) at insulator-semiconductor interfaces of Pt/$HfO_2$/p-type Si metal-insulator-semiconductor (MIS) capacitors. The leakage current characteristics of the MIS capacitor were analyzed according to the J-V and C-V curves. The leakage current behavior of the capacitors, which depends on the applied electric field, can be described using the Poole-Frenkel (P-F) emission, trap assisted tunneling (TAT), and direct tunneling (DT) models. The leakage current transport mechanism is controlled by the trap level energy depth of $HfO_2$. In order to further study the SBH and the electronic tunneling mechanism, the internal photoemission (IPE) yield was measured and analyzed. We obtained the SBH values of the Pt/$HfO_2$/p-type Si for use in Fowler plots in the square and cubic root IPE yield spectra curves. At the Pt/$HfO_2$/p-type Si interface, the SBH difference, which depends on the electrical potential, is related to (1) the work function (WF) difference and between the Pt and p-type Si and (2) the sub-gap defect state features (density and energy) in the given dielectric.

Process Temperature Dependence of Al2O3 Film Deposited by Thermal ALD as a Passivation Layer for c-Si Solar Cells

  • Oh, Sung-Kwen;Shin, Hong-Sik;Jeong, Kwang-Seok;Li, Meng;Lee, Horyeong;Han, Kyumin;Lee, Yongwoo;Lee, Ga-Won;Lee, Hi-Deok
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.13 no.6
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    • pp.581-588
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    • 2013
  • This paper presents a study of the process temperature dependence of $Al_2O_3$ film grown by thermal atomic layer deposition (ALD) as a passivation layer in the crystalline Si (c-Si) solar cells. The deposition rate of $Al_2O_3$ film maintained almost the same until $250^{\circ}C$, but decreased from $300^{\circ}C$. $Al_2O_3$ film deposited at $250^{\circ}C$ was found to have the highest negative fixed oxide charge density ($Q_f$) due to its O-rich condition and low hydroxyl group (-OH) density. After post-metallization annealing (PMA), $Al_2O_3$ film deposited at $250^{\circ}C$ had the lowest slow and fast interface trap density. Actually, $Al_2O_3$ film deposited at $250^{\circ}C$ showed the best passivation effects, that is, the highest excess carrier lifetime (${\tau}_{PCD}$) and lowest surface recombination velocity ($S_{eff}$) than other conditions. Therefore, $Al_2O_3$ film deposited at $250^{\circ}C$ exhibited excellent chemical and field-effect passivation properties for p-type c-Si solar cells.