• Proceedings of the Korean Operations and Management Science Society Conference
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• 1998.10a
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• pp.304-308
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• 1998

With the advances in concurrent engineering, schedulability has become an important design issue in machine loading and routing procedure. In this paper, four rules to improve schedulability of loading and routing are formulated as a mixed-integer programming model based on machine, routing and tool flexibilities. In this model, these rules are represented as an objective function or constraints. The impact of rules on the quality of schedules for the result of loading and routing is measured with makespan, throughput and average machine utilization.

• Journal of the Korea Convergence Society
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• v.12 no.2
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• pp.15-20
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• 2021

The imprecise real-time scheduling can be used for minimizing the bad effects of timing faults by leaving less important tasks unfinished if necessary when a transient overload occured. In the imprecise scheduling, every time-critical task can be logically decomposed into two tasks : a mandatory task and an optional task. Recently, some studies in this field showed good schedulability performance and minimum total error by deferring the optional tasks. But the schedulability performance of the studies can be shown only when the execution time of each optional task was less than or equal to the execution time of its corresponding mandatory task. Therefore, in this paper, a new deferring strategy is proposed under the reverse execution time restriction to the previous studies. Nevertheless, the strategy produces comparable or superior schedulability performance to the previous studies and can minimize the total error also.

• Journal of KIISE:Computer Systems and Theory
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• v.29 no.9
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• pp.520-529
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• 2002

This paper presents an approach for scheduling network messages with real-time dynamic algorithms. We present the method that calculates an intermediate relative deadline of the message based on the EDF(Earliest Deadline First) scheduling policy. We adjust the slack of message by using this intermediate relative deadline to allocate a priority of message. The priority of the message can be determined accurately by using the slack that calculates in our approach, which increases the schedulability efficiency of the message. As a result, we reduce the worst-case response time and improve the guarantee ratio of real-time messages. Also, we describe the analysis method to check the schedulability on message sets, and show the efficiency of our approach by comparing the results of the DM(Deadline Monotonic) approach and the existing EDF approach with that of the improved EDF in our approach through the simulation.

• Journal of Electrical Engineering and information Science
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• v.1 no.1
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• pp.118-128
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• 1996

In safety critical hard real-time systems, a timing fault may yield catastrophic results. In order to eliminate the timing faults from the fast responsive real-time control systems, it is necessary to schedule a code based on high precision timing analysis. Further, the schedulability enhancement by having multiple processors is of wide spread interest. However, although an instruction level parallel processing is quite effective to improve the schedulability of such a system, none of the real-time applications employ instruction level parallel scheduling techniques because most of the real-time scheduling models have not been designed for fine-grain execution. In this paper, we present a timing constraint model specifying high precision timing constraints, and a practical approach for constructing static schedules for a VLIW execution model. The new model and analysis can guarantee timing accuracy to within a single machine clock cycle.

• The KIPS Transactions:PartA
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• v.16A no.6
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• pp.437-442
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• 2009

For multiprocessor systems, Earliest Deadline First (EDF) based on deadline and Least Laxity First (LLF) based on laxity are not suitable for practical environment since EDF has low schedulability and LLF has high context switching overhead. As a combining of EDF and LLF to improve the performance, Earliest Deadline Zero Laxity (EDZL) was proposed. EDZL is basically the same as EDF. But if the laxity of a task becomes zero, its priority is promoted to the highest level. In this paper, we propose Least Laxity Zero Laxity (LLZL) which is based on LLF. But context switching is allowed only if the laxity of a task on rady queue becomes zero. Simulation results show that LLZL has high schedulability approaching to LLF and low context switching overhead similar to EDF. In comparison with EDZL, LLZL has better performance in both of schedulability and context switching overhead.

• Journal of KIISE:Information Networking
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• v.32 no.5
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• pp.633-640
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• 2005

This paper proposes and analyzes a message scheduling scheme and corresponding bandwidth allocation method for the hard real-time communication on dual standard 802.11 Wireless LANs. By making the superframeof one network precede that of the other by half, the dual network architecture can minimize the effect of deferred beacon and reduce the worst case waiting timeby half. The effect of deferred beacon is formalized and directly considered to decide the polling schedule of PCF phase. Simulation results executed via ns-2 show that the proposed scheme can improve the schedulability by 3$36\%$ for real-time messages and give $9\%$ more bandwidth to non-real-time messages for the given stream sets, compared with the network whose bandwidth is just doubled with the same MAC.

• Journal of Computing Science and Engineering
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• v.3 no.1
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• pp.59-71
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• 2009

While the average-case performance is important for general-purpose applications, worst-case performance is crucial for real-time systems to ensure schedulability and reliability. Recent work has shown that simple prefetching techniques such as the Next-N-Line prefetching can benefit both average-case and worst-case performance; however, the improvement on the worstcase execution time (WCET) is rather limited and inefficient. This paper presents two instruction prefetching approaches that are specially designed to enhance the worst-case performance, including the loop-based prefetching and WCET-oriented prefetching. Our experiments indicate that both instruction prefetching techniques can achieve better worst-case execution cycles than the Next-N-Line prefetching while having various impacts on the average-case performance.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2005.11a
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• pp.117-120
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• 2005

A Digital Broadcasting Satellite (DBS) receiver converts digital A/V streams received from a satellite to analog NTSC A,/V signals in real-time. Multi-tasking is an efficient way to improve the utilization of the processor core in real-time applications. In this paper, we propose a hybrid approach with a balanced trade-off between hardware kernel and multi-tasking programming to increase a system throughput. First, the schedulability of the critical hard real-time tass in the DBS receiver is verified by using a simple feasibility test. Then. several soft real-time tasks are thoughtfully programmed to satisfy functional requirements of the system.

• Journal of Broadcast Engineering
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• v.12 no.1 s.34
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• pp.53-60
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• 2007

A Digital Broadcasting Satellite (DBS) receiver converts digital A/V streams received from a satellite to analog NTSC A/V signals in real-time. Multi-tasking is an efficient way to improve the utilization of the processor core in real-time applications. In this paper, we propose a hybrid approach with a balanced trade-off between hardware kernel and multi-tasking programming to increase a system throughput. First, the schedulability of the critical hard real-time tasks in the DBS receiver is verified by using a simple feasibility test. Then, several soft real-time tasks are thoughtfully programmed to satisfy functional requirements of the system.