• 한국정보디스플레이학회:학술대회논문집
• /
• 2007.08b
• /
• pp.1629-1631
• /
• 2007

Significant process in the performance and commercialization of full-color thin-film electroluminescent(EL) displays has been achieved. This is due to the remarkable progress made in the performance of exiting EL phosphors, development of new phosphor materials, and design of new EL phosphor structures. In this paper, we fabricated thinfilm EL devices with ZnS buffer and $BaTiO_3$ electric layer with on top and bottom of phosphor layer. The effect of ZnS and $BaTiO_3$ layer on the luminance of EL device were studied.

• Proceedings of the IEEK Conference
• /
• 2008.06a
• /
• pp.579-580
• /
• 2008

DRAM설계시 DDR2에서부터 고속 동작으로 인해 반송파에 의한 신호외곡으로 impedance matching의 필요성이 대두되었다. 이로 인해 제안된 방법은 외부 Termination 저항(RZQ)을 기준으로 impedance matching을 위한 Rtt 저항의 생성이다.[1] 제안된 ZQ Calibration 회로는 기존의conventional ZQ Calibration 회로에 After ZQ calibration block을 추가하여 한 번 더 교정함으로써 마지막 PMOS Array와 NMOS Array 저항 값이 Termination 저항 값에 가깝도록 설계하였다. 따라 전력효율은 그대로 유지하면서 ${\Delta}VM$의 오차범위를 기존의 ${\pm}5%$이내에서 skew 조건에 따라 ${\pm}1.33%$까지 향상시키는 것을 볼 수 있다. (JEDEC spec. ${\pm}5%$이내).

• Proceedings of the Korea Society for Simulation Conference
• /
• 1998.03a
• /
• pp.86-90
• /
• 1998

The safety and reliability of nuclear power plant operations relies heavily on the plant operators ability to respond to various emergency situations. It has become standard industry practice to utilize simulators to improve the safety and reliability of nuclear power plants operations. The simulators built for Younggwang#3,4, which is the basic model of the Korean Nuclear Power Plant design, has been developed precisely for this purpose. Dynamic Model and Display Model are developed under US3(UNIX Simulation Software Support System) environment in simulator for Younggwang#3,4. Since these two models are developed under each own operating system, it is necessary to develop a method for transporting data between these two systems. This paper descirves communication environment between Dynamic Model and Display Model, and addresses a file generation method for the Display Model, which will be necessary for designing MMI of MCR(Main Control Room) in the furture.

• Proceedings of the Safety Management and Science Conference
• /
• 2005.05a
• /
• pp.453-459
• /
• 2005

On this research, we show some concrete examples as software design, 2D/3D display, graph display, and gage display to develop a data monitoring system for real time safe fire testing. Developed software which is simulation software for live fire testing, has been designed to display informations about whole test status in a live fire testing, and with this, user can control a live fire testing under the safe environment. Beside, we increase a security by using a authority of user to access on this software. and we develop it based on module designed to apply a requirement of user later on.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2009.10a
• /
• pp.1379-1382
• /
• 2009

The 3D display has been used in optical projection technology to connect twenty mini- projectors with seamless image tiling. In this way, we can improve the projected resolution by reducing each project screen and increase projected area by connect several mini-projectors. In this article, the illumination system uses the LED light source, non- telecentric structure and LCOS panel, and it's total length is less than 10 centimeter. It can build a seamless large display by tiling multiple projectors.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2007.08a
• /
• pp.822-824
• /
• 2007

This paper investigated a gate driver circuit with amorphous silicon for mobile TFT-LCD. In the conventional circuit, the fluctuation of the off-state voltage causes the fluctuation of gate line voltages in the panel and then image quality becomes worse. Newly designed gate driver circuit with dynamic switching inverter and carry out signal reduce the fluctuation of the off-state voltage because dynamic switching inverter is holding the off-state voltage and the delay of carry signal is reduced. The simulation results show that the proposed a-Si:H gate driver has low noise and high stability compared with the conventional one.

• Journal of Applied Reliability
• /
• v.2 no.1
• /
• pp.15-22
• /
• 2002

This paper is concerned about an Accelerated Life Test for Micro Display Device which is being used in a Projection TV, in order to find a failure mode occurred in field in a short time, to identify a major factor to affect a life, and to estimate a mean life. For this purpose, we selected a temperature as a accelerated factor to perform a test and measured degradation of display device using visual inspection and chromaticity table. In the result of Accelerated Life Test, it is confirmed that failure mode is equal to the degradation of display device by vendor and the Temperature is a major factor to affect a failure. Besides, according as the display device is turned to green as degraded, it is identified that the change of the chromaticity value is one method to measure the degree of the degradation . So, we applied the optimal condition, which consider a cost and life to lower the Temperature which is a major factor acquired by the result of ALT, to PTV design

• Journal of the Korea Safety Management & Science
• /
• v.7 no.2
• /
• pp.65-72
• /
• 2005

On this research, we show some concrete examples as software design, 2D/3D display, graph display, and gage display to develop a data monitoring system for real time safe fire testing. Developed software which is simulation software for live fire testing, has been designed to display informations about whole test status in a live fire testing, and with this, user can control a live fire testing under the safe environment. Beside, we increase a security by using a authority of user to access on this software. and we develop it based on module designed to apply a requirement of user later on.

• Journal of the Semiconductor & Display Technology
• /
• v.19 no.2
• /
• pp.82-87
• /
• 2020

In this paper, we introduce the novel idea to improve the B/W usage efficiency of on-chip networks used for TAM to test multiple DRAMs. In order to avoid the local bottleneck of test packets caused by an ATE, we make test patterns using microcode-based instructions within ATE and adopt a test bus to transmit test responses from DRAM DFT (Design for Testability) called Test Generator (TG) to ATE. The proposed test platform will contribute to increasing the test economics of memory IC industry.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.14 no.8
• /
• pp.1895-1900
• /
• 2010

In this paper, we propose the hardware architecture of a display converter which is consisted of four functional blocks. The four functional blocks consists of a set of color space converter, de-interacer, video display scaler, and gamma corrector. After the proposed architecture was implemented into hardware, we verified that it operated exactly. The designed hardware has 7,629 LUT and 6,800 Logic Register in Stratix device of Altera and operates in 270 MHz clock frequency.