• The Journal of the Acoustical Society of Korea
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• v.31 no.5
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• pp.273-279
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• 2012

In this thesis, a nonlinear compression fitting method was studied for each frequency channel of a 64 channel digital hearing aid. Unlike conventional fitting formula method done from the result of the hearing loss test, the present fitting method uses the auditory threshold of sound pressure measured near the tympanic membrane while ITE (In-The-Ear) hearing aid is fitted into the user's ear canal. Also, the spectral distribution of the voice sound pressure was used for realizing of output sound pressure compression curves against input sound pressure level. Theoretical research results of FFT-iFFT compression algorithm has been evaluated by experimental gain measurements at each different input sound pressure level 50 dB, 70 dB, 90 dB respectively.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.10 no.1
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• pp.102-110
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• 2017

In this paper, we have implemented an real-time adaptive feedback cancellation(AFC) algorithm that can be applied to multi-channel digital hearing aid. Multichannel digital hearing aid typically use the FFT filterbank based Wide Dynamic Range Compression(WDRC) algorithm to compensate for hearing loss. The implemented real-time acoustic feedback cancellation algorithm has one integrated structure using the same FFT filter bank with WDRC, which can be beneficial in terms of computation affecting the hearing aid battery life. In addition, when the AFC fails to operate due to nonlinear input and output, the reduction gain is applied to improve robustness in practical environment. The implemented algorithm can be further improved by adding various signal processing algorithm such as speech enhancement.

• 제어로봇시스템학회:학술대회논문집
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• 2005.06a
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• pp.190-195
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• 2005

The hearing aid chip described in this paper is an analog & digital mixed system. The design focuses on the$\mu$DSP core. This $\mu$DSP core includes internal time delays to two inputs from front and rear microphones. The paper consists of two parts; one is the composure and signal processing algorithm of digital hearing aids and the other is Verilog HDL codes for$\mu$DSP cores. All digital modules in the design were coded and synthesized by Verilog HDL codes which were verified by Mentor Graphics and Synopsis semiconductor chip design tools.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.415-418
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• 2005

DSP chip parameters of a digital hearing aid (HA) should be optimally selected or fitted for hearing impaired persons. The more precise parameter fitting guarantees the better compensation of the hearing loss (HL). Digital HAs adopt DSP chips for more precise fitting of various HL threshold curve patterns. A specific DSP chip such as Gennum GB3211 was designed and manufactured in order to match up to about 4.7 billion different possible HL cases with combination of 7 limited parameters. This paper deals with a digital HA fitting program which is developed for optimal fitting of GB3211 DSP chip parameters. The fitting program has completed feature from audiogram input to DSP chip interface. The compensation effects of the microphone and the receiver are also included. The paper shows some application examples.

• Proceedings of the KOSOMBE Conference
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• v.1997 no.11
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• pp.79-82
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• 1997

In this paper, a body-worn type digital hearing aid (DHA) based on a dedicated DSP chip is developed. A fitting software running on a PC supported by the Win95 OS is also developed. The fitting protocol is based on the NAL-R procedure applied to eight frequency bands, but it is designed to support a curvilinear fitting to cope with the nonlinear perception of hearing-impaired listeners. Preliminary subjective tests regarding the speech intelligibility and perceived quality revealed that the new DHA could be of benefit to hearing aid users.

• Proceedings of the KIEE Conference
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• 2004.11c
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• pp.577-579
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• 2004

Digital hearing aids enclose $6{\sim}8$ tiny components. Those electromechanical components are individually wired by soldering which is a manual labor and sometimes causes components' damage by heating. This paper suggests a PCB design for overcome these problems. Several PCBs are designed and manufactured and circuited to produce ITE(In The Ear) type hearing aids which are inserted in the ear canal. The most optimal size of the PCB design for the ITE hearing aid is presented in this paper.

• Proceedings of the KSME Conference
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• 2004.11a
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• pp.1012-1015
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• 2004

Digital hearing aids enclose $6{\sim}8$ tiny components. Those electromechanical components are individually wired by soldering which is a manual labor and sometimes causes components' damage by heating. This paper suggests a PCB design for overcome these problems. Several PCBs are designed and manufactured and circuited to produce ITE(In-the-Ear) type hearing aids which are inserted in the ear canal. The most optimal size of the PCB design for the ITE hearing aid is presented in this paper.

• Proceedings of the KOSOMBE Conference
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• v.1997 no.05
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• pp.342-344
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• 1997

Owing to technical advances in very large-scale integrated circuits (VLSI), high-speed digital signal processing (DSP) chips become fast enough to allow for real-time implementation of hearing aid algorithms in units small enough to be wearable. In this paper, we present a digital hearing aid processor (DHAP) chip built around a general-purpose 16-bit DSP core. The designed DHAP performs a nonlinear loudness correction of 8 octave frequency bands based on audiometric measurements. By employing a programmable DSP, the DHAP provides all the flexibility needed to implement audiological algorithms. In addition, the has a low power feature and $5.410\times5.720mm^2$ dimensions that fit for wearable devices.

• Journal of Biomedical Engineering Research
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• v.25 no.4
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• pp.315-321
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• 2004

In this study, we proposed an adaptive feedback cancellation algorithm for multi-band digital healing aids. The adaptive feedback canceller (AFC) is composed of an adaptive notch filter (ANF) for feedback detection and an NLMS (normalized least mean square) adaptive filter for feedback cancellation. The proposed feedback cancellation algorithm is combined with a multi-band hearing aid algorithm which employs the MDCT (modified discrete cosine transform) filter bank for the frequency-dependent compensation of hearing losses. The proposed algorithm together with the MDCT-based multi-channel hearing aid algorithm has been evaluated via computer simulations and it has also been implemented on a commercialized DSP board for real-time verifications.

• Journal of Biomedical Engineering Research
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• v.18 no.4
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• pp.467-476
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• 1997

This paper presents a designing of a digital hearing aid processor (DHAP) chip being operated by a dedicated DSP core. The DHAP for hearing aid devices must be feasible within a size and power consumption required. Furthermore, it should be able to compensate for wide range of hearing losses and allow sufficient flexibility for the algorithm development. In this paper, a programmable 16-bit fixed-point DSP core is employed thor the designing of the DHAP. The designed DHAP performs a nonlinear loudness correction of 8 frequency bands based on audiometric measurements of impaired subjects. By employing a programmable DSP, the DHAP provides all the flexibility needed to implement audiological algorithms. In addition, the chip has low-power feature and $5, 500\times5000$$\mu$$m^2$ dimensions that fit for wearable hearing aids.