Digital Hearing Aids Specific $\mu$DSP Chip Design by Verilog HDL

  • Jarng, Soon-Suck (Department of Information Control & Instrumentation, Chosun University) ;
  • Chen, Lingfen (Department of Information Control & Instrumentation, Chosun University) ;
  • Kwon, You-Jung (Department of Information Control & Instrumentation, Chosun University)
  • Published : 2005.06.02

Abstract

The hearing aid chip described in this paper is an analog & digital mixed system. The design focuses on the$\mu$DSP core. This $\mu$DSP core includes internal time delays to two inputs from front and rear microphones. The paper consists of two parts; one is the composure and signal processing algorithm of digital hearing aids and the other is Verilog HDL codes for$\mu$DSP cores. All digital modules in the design were coded and synthesized by Verilog HDL codes which were verified by Mentor Graphics and Synopsis semiconductor chip design tools.

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