• The Transactions of The Korean Institute of Electrical Engineers
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• v.65 no.11
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• pp.1913-1918
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• 2016

In order to analyze the power consumption pattern of the DC urban rail system, the method to obtain a solution establishing the current equation according to fixed position of the substation and varying position of the train is used. The proposed analysis method using the network analysis is to model the transfer function of the component constituting a direct current power supply system (dc substation, train, catenary) to the voltage and current. By multiplying the model formula consecutive, it can calculate the voltage and current of each element of power supply circuit and shows a simple case analysis.

• Proceedings of the Korea Institute of Applied Superconductivity and Cryogenics Conference
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• 2001.02a
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• pp.84-88
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• 2001

The optimum cross-sectional area Profile of gas-cooled high-temperature superconductor (HTS) current lead is analyzed to have minimum helium boil-off rate. The conventional constant area HTS lead has much higher helium consumption than the optimum HTS lead considered in this study. The optimum HTS lead has variable cross-sectional area to have constant safety factor. An analytical formula of optimum shape of lead and temperature profile are obtained. For multi-step HTS current leads, the optimum tape lengths and minimum heat dissipation rate are also formulated. The developed formulations are applied to the Bi-2223 material, and the differences between constant area, constant safety-factor, and multi-step current leads are discussed.

• Korean Journal of Air-Conditioning and Refrigeration Engineering
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• v.15 no.4
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• pp.329-335
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• 2003

This study is on a experiment which shows to defrost automatically on the optimum time regardless of defrosting method. The result shows that the more defrost layers increase in fin tubes of evaporation, the less the section of the circulating air reduce. Thickness of the frost formation increases, so a pressure difference of ventilation increase, as a result automatic defrosting system sets the time COP drops suddenly up optimum time. Automatical defrosting system can find out the initial related current of evaporator fan motor and the value of load current in the optimum time. And it sets defrosting time, evaporating temperature, and temperature in refrigerator up system requiring value. Consequence of this experiment is that energy consumption with defrost load gets effect of reduction of eleven percent per 25.4 hours compared with common defrosting.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.6
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• pp.58-70
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• 1997

In this paper, an 8bit CMOS low power, high-speed current-mode folding and interpolation A/D converter is designed with te LG semicon $0.8\mu\textrm{m}$ N-well single-poly/double-metal CMOS process to be integrated into a portable image signal processing system such as a digital camcoder. For good linearity and low power consumption, folding amplifiers and for high speed performance of the A/D converter, analog circuitries including folding block, current-mode interpolation circuit and current comparator are designed as a differential-mode. The fabricated 8 bit A/D converter occupies the active chip area of TEX>$2.2mm \times 1.6mm$ and shows DNL of $\pm0.2LSB$, INL of <$\pm0.5LSB$, conversion rate of 40M samples/s, and the measured maximum power dissipation of 33.6mW at single +5V supply voltage.

• Journal of Korea Society of Industrial Information Systems
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• v.18 no.1
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• pp.19-24
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• 2013

As CMOS technology is scaled down more aggressively, the reliability mechanism (or aging effect) caused by the diffusion of metal atoms along the conductor in the direction of the electron flow, also called electromigration (EM), has become a major reliability concern. With the present of EM, it is difficult to control the current flows of the MOSFET device and interconnect. In addition, nanoscale CMOS circuits suffer from increased gate leakage current and power consumption. In this paper, the EM effects on current of the nanoscale CMOS circuits are analyzed. Finally, this paper introduces an on-chip current measurement method providing lifetime electromigration management which are designed using 45-nm CMOS predictive technology model.

• Journal of IKEEE
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• v.14 no.2
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• pp.1-8
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• 2010

In this paper, Green Mode Power IC is designed to reduce the standby power. The proposed and designed IC works for the Switch Mode Power Supply(SMPS) and has the function of PWM. To reduce the unnecessary electric power, burst mode and skip mode section are introduced and controlled by external power MOSFET to diminish the standby power. The proposed IC is designed and simulated by KEC 30V-High Voltage 0.5um CMOS Process. The structure of proposed IC is composed of voltage regulator circuit, voltage reference circuit, UVLO(Under Voltage Lock out) circuit, Ibias circuit, green circuit, PWM circuit, OSC circuit, protection circuit, control circuit, and level & driver circuit. Measuring the current consumption of each block from the simulation results, 1.2942 mA of the summing consumption current from each block is calculated and ot proved that it is within the our design target of 1.3 mA. The current consumption of the proposed IC in this paper is less than a half of conventional ICs, and power consumption is reduced to the extent of 1W in standby mode. From the above results, we know that efficiency of proposed IC is superior to the previous IC.

• Korean System Dynamics Review
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• v.10 no.3
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• pp.5-23
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• 2009

Transportation systems around the world are difficult to maintain sustainability that, in a broad sense, is the capacity to endure. By connecting Entropy theory and systems thinking, we find the current problems and seek alternative plans. Distortions of the current transportation system to improve individual's ease and increasing traffic congestion, impose us the heavy energy consumption and will make increase whole entropy. UNEP reports are presented following three reasons that undermine the sustainabillity. The first one is that the prevalent traffic system highlight benefits of accessibility than benefits of mobility, the second, deteriorate excessive energy consumption, and the last reason is that personal vehicles has inhibited the use of public transportation. Alternative ideas to enhance the sustainable transportation system are these; (1) changeover from 'Ease of movement' to 'space efficiency', (2) evolving the smart traffic system instead of the construction or expansion of the road and (3) creating more comfortable the use of mass transportation. In addition, there are another ways that encouraging modal shift that increase traffic of goods, transport over railway lines and waterways, decongesting transport corridors and elevating technology to improve public transportation. The most importantly, we converse our cognitive process to be willing to enjoy uncomfortable and annoying life.

• JSTS:Journal of Semiconductor Technology and Science
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• v.12 no.2
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• pp.186-192
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• 2012

Half-rail stacked drivers are used to reduce power consumption of the drivers for synchronous buck converters. In this paper, the stacked driver is optimized by matching the average charging and discharging currents used by high-side and low-side drivers. By matching the two currents, the average intermediate bias voltage can remain constant without the aid of the voltage regulator as long as the voltage ripple stays within the window defined by the hysteresis of the regulator. Thus the optimized driver in this paper can minimize the power consumption in the regulator. The current matching requirement yields the value for the intermediate bias voltage, which deviates from the half-rail voltage. Furthermore the required capacitance is also reduced in this design due to decreased charging current, which results in significantly reduced die area. The detailed analysis and design of the stacked driver is verified through simulations done using 5V MOSFET parameters of a typical 0.35-${\mu}m$ CMOS process. The difference in power loss between the conventional half-rail driver and the proposed driver is less than 1%. But the conventional half-rail driver has excess charge stored in the capacitor, which will be dissipated in the regulator unless reused by an external circuit. Due to the reduction in the required capacitance, the estimated saving in chip area is approximately 18.5% compared to the half-rail driver.

• 전자공학회논문지 IE
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• v.47 no.2
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• pp.1-7
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• 2010

This paper presents a low power digital PLL architecture and design for implementation of the PLL-based frequency synthesizers. In the proposed architecture, a wide band digital logic quadricorrelator is used for preliminary frequency detector and a narrow band digital logic quadricorrelator is used for final DCO control. Also, a circuit technique for reducing leakage current is adopted in order to minimize the standby mode power consumption of the deactivated block. The proposed digital PLL is designed and verified by MyCAD with MOSIS 1.8V $0.35{\mu}m$ CMOS technology, and the simulation results show that the power consumption can be lowered by more than 20%.

• New & Renewable Energy
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• v.3 no.4
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• pp.31-37
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• 2007

Because of their low operating and maintaining costs, ground-source heat pump(GSHP) systems are an increasingly popular choice for providing heating, cooling and water heating to public and commercial buildings. Despite these advantages and the growing awareness, GSHP systems to residential sectors have not been adopted in Korea until recently. A feasibility study of a residential GSHP system was therefore conducted using the traditional life cycle cost(LCC) analysis within the current electricity price framework and potential scenarios of that framework. As a result, when the current residential electricity costs for running the GSHP system are applied, the GSHP system has weak competitiveness to conventional HV AC systems considered. However, when the operating costs are calculated in the modified price frameworks of electricity, the residential GSHP system has the lower LCC than the existing cooling and heating equipments. The calculation results also show that the residential GSHP system has lower annual prime energy consumption and total pollutant emissions than the alternative HVAC systems considered in this work.