• International journal of advanced smart convergence
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• v.12 no.4
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• pp.1-7
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• 2023

Large-size, organic light-emitting device (OLED) panels based on highly reliable gate driver circuits integrated using InGaZnO thin film transistors (TFTs) were developed to achieve ultra-high resolution TVs. These large-size OLED panels were driven by using a novel gate driver circuit not only for displaying images but also for sensing TFT characteristics for external compensation. Regardless of the negative threshold voltage of the TFTs, the proposed gate driver circuit in OLED panels functioned precisely, resulting from a decrease in the leakage current. The falling time of the circuit is approximately 0.9 ㎲, which is fast enough to drive 8K resolution OLED displays at 120 Hz. 120 Hz is most commonly used as the operating voltage because images consisting of 120 frames per second can be quickly shown on the display panel without any image sticking. The reliability tests showed that the lifetime of the proposed integrated gate driver is at least 100,000 h.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.3A
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• pp.430-434
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• 2000

In this paper, a novel photonic bandgap(PBG) structure is proposed for increasing stropband of lowpass filter without the size increment of circuit for application in microstrip circuits. The proposed structure is connected in parallel two periodic structures which have different center frequency of the stopband. The wide stopband is achieved by two periodic structures of two different stopbands. We also show the performance improvement of microstrip patch antenna by etching of the proposed structure in ground plane.

• Proceedings of the IEEK Conference
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• 2002.07a
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• pp.650-653
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• 2002

The increaseing speeds are accompanied by decreases in pulse rise and fall time in VLSI circuits. These accenturate the high frequency spectral contents of the signals and cause the frequency dependent loss of the conductors which interconnect the various sub-circuits composing of VLSI circuit. The lossy effect is approximated by the square root of frequency dependence of the per unit length resistance. In the practical applications, several problems may arise along with this approximation, so we extend our investigation of the lossy effect by numerical Laplace inversion method.

• Proceedings of the IEEK Conference
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• 2000.11a
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• pp.353-356
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• 2000

Multi-bias parameter extraction technique for HEMT small signa] equivalent circuits is presented in this paper. The technique in this paper uses S-parameters measured at various bias points in the active region to construct one optimization problem, of which the vector of unknowns contains only a set of bias-independent elements. Tests are peformed on measured S-parameters of a pHEMT at 30 bias points. Results indicate that the calculated S-parameters is similar to the measured data.

• Proceedings of the IEEK Conference
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• 2003.07c
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• pp.2609-2612
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• 2003

This paper describes a 64 channel signal generator/analyzer module that is useful for verification and testing of digital circuits. It can perform logic analyzer function and signal generator function at the same time. The 64 Channel module is implemented with single FPGA chip for miniaturization, and an USB interface is used to increase portability of the module. Multiple modules can be used in parallel for the verification of large scale circuits. Moreover, since the module is implemented as a PC based system, one can configure convenient GUI(Graphic User Interface) environment.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.3
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• pp.39-46
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• 1994

CMOS LCD driving circuits using poly-Si TFT have been designed and basic blocks including test patterns have been fabricated. Column driver drives the pixels by block because polu-Si TFT can not operate at the speed of video signal. Row driver has mode selection circuit which can select a mode between interlacing mode and non-interlacing mode. Experimental results show shift register can operate at 1MHz colck frequency with 4pF load.

• 한국정보디스플레이학회:학술대회논문집
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• 2004.08a
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• pp.749-752
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• 2004

Unlike OLEDs, there is no lifetime testing procedure for TFTs. In this work, we have defined such a procedure and developed a method for the accelerated stress testing of TFT pixel circuits in a-Si AMOLED displays. The acceleration factors derived are based on high current and temperature stress, and can be used to significantly reduce the testing time required to guarantee a 20000-hour display backplane lifespan.

• 한국정보디스플레이학회:학술대회논문집
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• 2004.08a
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• pp.81-84
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• 2004

Required characteristics of poly-Si TFT's are investigated for the implementation of analog circuits to be integrated on System-on-Glass (SoG). Matching requirements on resistor values, threshold voltage and mobility of poly-Si TFT's are derived as a function of the resolution of display system. Effective mobility of poly-Si TFT's required for the realization of source driver is analyzed for various panel sizes.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.53 no.10
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• pp.500-504
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• 2004

We propose a new method to reduce the subthreshold leakage current. By moving the operating point of OFF state MOSFETs through input-controlled voltage generators, logic circuits with much lower leakage current can be built with few extra components. SPICE simulation results for the new inverter show correct logic results without speed degradation compared to a conventional inverter.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.787-790
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• 1998

In this paper, we presents a method for multi-level logic mainmization which is suitable for the minimization of look-up table type FPGAs. A pattern extraction algorithm is minimized AND/XOR multi-level circuits. The circuits apply to Roth-Karp decomposition which is most commonly used technique in the FPGA technology mapping. We tested the FPGA synthesis method using pattern extraction on a set of benchmark. The proposed method achieved reductions on the number of LUTs in mapping soultion as compared with MISII(or SIS) or previous results〔5〕