• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2000년도 하계종합학술대회 논문집(2)
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• pp.250-253
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• 2000

In this paper, we Implement a new arithmetic computation for MPEG audio data to overcome the limitations of real number processing in the fixed-point arithmetics, such as: overheads in processing time and power consumption. We aims at efficiently dealing with real numbers by extending the fixed-point arithmetic manipulation for floating-point numbers in MPEG audio data, and implementing the DSP libraries to support the manipulation and computation of real numbers with the fixed-point resources.

• 대한수학회논문집
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• 제31권1호
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• pp.95-100
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• 2016

In this paper, we establish a new refinement of the arithmetic-geometric mean inequality. Applying this result in information theory, we obtain a more precise upper bound for Shannon's entropy.

• Journal of the Korean Data and Information Science Society
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• 제14권1호
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• pp.93-101
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• 2003

Computation with fuzzy numbers is a prospective branch of a fuzzy set theory regarding the data processing applications. In this paper we consider an open problem about distributivity of fuzzy quantities based on the extension principle suggested by Mare (1997). Indeed, we show that the distributivity on the class of fuzzy numbers holds and min-norm is the only continuous t-norm which holds the distributivity under t-norm based fuzzy arithmetic operations.

• 한국지능시스템학회논문지
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• 제13권2호
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• pp.231-236
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• 2003

Recently, Oussalah 〔Fuzzy Sets and Systems 128(2002) 247-260〕 investigated some theoretical results about some invariance properties concerning the relationships between the defuzzification outcomes and the arithmetic of fuzzy numbers. But, in this note we introduce some explicit calculations of the resulting fuzzy set or possibility distribution when the matter is the determination of the defuzzified value pertaining to the result of some manipulation of fuzzy quantities under t-norm based fuzzy arithmetic operations.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 ITC-CSCC -2
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• pp.1153-1156
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• 2002

In this parer, a high quality mesh generation method by using interval arithmetic is proposed. In the proposed method, the variance of a tangent vector at the point is considered by the automatic differentiation. From the variance, sampling points on the surface are judged whether it is adequate or not, which is calculated by the interval arithmetic. Then Delaunay triangulation is performed to the obtained sampling points, and a set of meshes is generated. The proposed method is hard to overlook the local variation of surfaces.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1999년도 하계종합학술대회 논문집
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• pp.821-824
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• 1999

In distributed arithmetic-based architecture for an inner product between two length-N vectors, the size of the ROM increases exponentially with N. Moreover, the ROMs are generally the bottleneck of speed, especially when their sire is large. In this paper, a ROM size reduction technique for DA (Distributed Arithmetic) is proposed. The proposed method is based on modified OBC (Offset Binary Coding) and control circuit reduction technique. By simulations, it is shown that the use of the proposed technique can result in reduction in the number of gates up to 50%.

• 한국수학교육학회지시리즈D:수학교육연구
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• 제18권1호
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• pp.31-40
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• 2014

Working with dynamic visual representations can help students-with-computer discover new mathematical ideas. Students translate among multiple representations as a strategy to investigate non-routine problems to explore possible solutions in mathematics classrooms. In this paper, we use the area models as new representations for our secondary students to investigate three problems related to the average speed of a particle. Students show their ideas in the process of investigating arithmetic mean, harmonic mean, and average speed through their created dynamic figures. These figures really utilize dynamic geometry software.

• 한국통신학회:학술대회논문집
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• 한국통신학회 1986년도 춘계학술발표회 논문집
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• pp.177-180
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• 1986

A high performance Butterfly Arithmetic Unit for FFT processor using two adders is proposed in this papers, which is Based on the distributed and merged arithmetic. Due to simple and easy architecture to implement, this proposed processor is well suited to systolic FFT processor. Simulation was performance using YSLOG (Yonsei logic simulator) on IBM AT computer, to verify logic. By using 3um double Metal CMOS technology,Butterfly arithmetic have been achieved in 1.2 usec.

• 대한수학회지
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• 제61권1호
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• pp.161-181
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• 2024

We describe the moduli space of Higgs pairs on an irreducible nodal curve of arithmetic genus one and its geometric structures in terms of the Hitchin map and a flat degeneration of the moduli space of Higgs bundles on an elliptic curve.

• East Asian mathematical journal
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• 제40권3호
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• pp.329-339
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• 2024

In the work we generate arithmetic matrix P^(c,b,a) of (cx² + bx+a)ⁿ from a Pascal matrix P^(1,1). We extend an identity P^(1,1))O^(1,1) = P^(1,1,1) with an obtuse matrix O^(1,1) to k degree polynomials. For the purpose we study P^(1,1)kO^(1,1) and find generating polynomials of O^(1,1)k.