• 제목/요약/키워드: yield map

검색결과 156건 처리시간 0.023초

소구획 경지에서의 벼 수확량 지도 작성 (Yield Mapping of a Small Sized Paddy Field)

  • 정선옥;박원규;장영창;이동현;박우풍
    • Journal of Biosystems Engineering
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    • 제24권2호
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    • pp.135-144
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    • 1999
  • An yield monitoring system plays a key role in precision farming. An yield monitoring system and a DGPS were implemented to a widely used domestic combine for yield mapping of a small sized paddy field, and yield mapping algorithms were investigated in this study. The yield variation in the 0.1ha rice paddy field was measured by installing a yield flow sensor and a grain moisture sensor at the end of the clean grain elevator discharging grains into a grain tank. Yield map of the test filed was drawn in a point map and a linear interpolated map based on the result of the field test. The size of a unit yield grid in yield mapping was determined based on the combine traveling speed, effective harvesting width and data storing period. It was possible to construct the yield map of a small sized paddy field.

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수율향상을 위한 반도체 EDS공정에서의 불량유형 자동분류 (Automatic Classification of Failure Patterns in Semiconductor EDS Test for Yield Improvement)

  • 한영신;이칠기
    • 한국시뮬레이션학회논문지
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    • 제14권1호
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    • pp.1-8
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    • 2005
  • In the semiconductor manufacturing, yield enhancement is an urgent issue. It is ideal to prevent all the failures. However, when a failure occurs, it is important to quickly specify the cause stage and take countermeasure. Reviewing wafer level and composite lot level yield patterns has always been an effective way of identifying yield inhibitors and driving process improvement. This process is very time consuming and as such generally occurs only when the overall yield of a device has dropped significantly enough to warrant investigation. The automatic method of failure pattern extraction from fail bit map provides reduced time to analysis and facilitates yield enhancement. The automatic method of failure pattern extraction from fail bit map provides reduced time to analysis and facilitates yield enhancement. This paper describes the techniques to automatically classifies a failure pattern using a fail bit map.

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FIELD MAPPING FOR PADDY RICE

  • Lee, C-K.;M. Umeda;M. Iida;J. Yanai;T. Kosaki
    • 한국농업기계학회:학술대회논문집
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    • 한국농업기계학회 2000년도 THE THIRD INTERNATIONAL CONFERENCE ON AGRICULTURAL MACHINERY ENGINEERING. V.II
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    • pp.254-261
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    • 2000
  • Soil chemical properties, relief of field surface, SPAD values and grain yield were investigated in a 0.5ha paddy field in 1999 to obtain basic field information for precision agriculture. Descriptive statistics of field information showed that the coefficient of variation ranged from 1.63% to 38.7%. Field information showed a high spatial dependence for within paddy field. The ranges of spatial dependence were from 15m to 60m, respectively. Kriged maps enable the visualization and comparison the spatial variability of field information. The causes of spatial variability of the field information could be explained rationally by a field management map. Grain yield was negatively correlated with pH, relief values, whereas, was positively correlated with total C, total N, C/N ratio, mineralizable N, available P and exchangeable K, Ca at the significant level of 1 %.

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DDI 칩 테스트 데이터 분석용 맵 알고리즘 (Analytic Map Algorithms of DDI Chip Test Data)

  • 황금주;조태원
    • 반도체디스플레이기술학회지
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    • 제5권1호
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    • pp.5-11
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    • 2006
  • One of the most important is to insure that a new circuit design is qualified far release before it is scheduled for manufacturing, test, assembly and delivery. Due to various causes, there happens to be a low yield in the wafer process. Wafer test is a critical process in analyzing the chip characteristics in the EDS(electric die sorting) using analytic tools -wafer map, wafer summary and datalog. In this paper, we propose new analytic map algorithms for DDI chip test data. Using the proposed analytic map algorithms, we expect to improve the yield, quality and analysis time.

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반도체 제조공정에서의 이상수율 검출 방법론 (A New Abnormal Yields Detection Methodology in the Semiconductor Manufacturing Process)

  • 이장희
    • Journal of Information Technology Applications and Management
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    • 제15권1호
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    • pp.243-260
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    • 2008
  • To prevent low yields in the semiconductor industry is crucial to the success of that industry. However, to prevent low yields is difficult because of too many factors to affect yield variation and their complex relation in the semiconductor manufacturing process. This study presents a new efficient detection methodology for detecting abnormal yields including high and low yields, which can forecast the yield level of a production unit (namely a lot) based on yield-related feature variables' behaviors. In the methodology, we use C5.0 to identify the yield-related feature variables that are the combination of correlated process variables associated with yield, use SOM (Self-Organizing Map) neural networks to extract and classify significant patterns of past abnormal yield lots and finally use C5.0 to generate classification rules for detecting abnormal yield lot. We illustrate the effectiveness of our methodology using a semiconductor manufacturing company's field data.

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GIS 및 원격탐사를 이용한 포항시 지하수 잠재가능성도 작성 및 검증 (Groundwater resources potential mapping and its verification using GIS and remote sensing in Pohang city)

  • 이사로;김용성;원종호
    • Spatial Information Research
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    • 제14권1호
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    • pp.115-128
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    • 2006
  • 본 연구의 목적은 GIS를 이용하여 공간자료 분석을 통한 포항지역의 지하수 개발적지 선정 및 검증을 하는 것이다 이를 위해 본 연구에서는 물수지, 토지이용, 임상도, 토양분포, 지형고도, 경사, 수문지질 및 선구조 등을 분석하였다. 그리고 이러한 분석 자료 및 GIS 공간분석기법을 이용하여 지하수 산출성 표본자료와 상관 분석하여 수문지질 특성평가를 실시하여 수문지질특성에 따른 지하수 산출 특성을 도출하였다. 이러한 결과를 바탕으로, 포항시의 지하수 개발 적지 선정을 위한 지하수 잠재 가능성도를 작성하였고, 이를 지하수 산출량 자료와 비교 검증을 하였다. 검증 결과 지하수 개발 적지 분석 결과와 지하수 산출량 자료와의 관련성이 높게 나타났다. 이러한 지하수 개발 적지 선정 결과는 지하수 개발에 관련된 관리에 사용될 수 있다.

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시계열 마스크 맵이 논벼 NDVI와 단수와의 관계에 미치는 영향 (Effect of the Application of Temporal Mask Map on the Relationship between NDVI and Rice Yield)

  • 나상일;안호용;박찬원;홍석영;소규호;이경도
    • 대한원격탐사학회지
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    • 제36권5_1호
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    • pp.725-733
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    • 2020
  • 본 연구의 목적은 (1) MCD12Q1 자료를 이용하여 시계열 마스크 맵 작성하여 (2) 시계열 마스크 맵의 연차별 논벼 재배면적 변화를 추출하고, (3) MYD13Q1 NDVI와 단수와의 상관계수를 비교하여 (4) 적용성을 검토하는 것이다. 이를 위해 2002년부터 2019년까지의 연도별 MCD12Q1 PFT 자료를 수집하여 시계열 마스크 맵을 작성하고 고정형 마스크 맵과 비교하였다. 그 결과, 시계열 마스크 맵에 의한 논벼 재배면적이 실제 논벼 재배면적의 변동 특성을 잘 반영하고 있는 것으로 나타났으며, 고정형 마스크 맵과 비교하여 NDVI와 논벼 단수와의 상관계수도 높게 나타나 시계열 마스크 맵이 논벼 고유의 식생지수 추출 및 작황 모니터링, 단수 추정의 정확도를 높이는 방법임을 확인하였다.

FEASIBILITY MAPPING OF GROUND WATER YIELD CHARACTERISTICS USING WEIGHT OF EVIDENCE TECHNIQUE: A CASE STUDY

  • Heo, Seon-Hee;Lee, Ki-Won
    • 대한원격탐사학회:학술대회논문집
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    • 대한원격탐사학회 2005년도 Proceedings of ISRS 2005
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    • pp.430-433
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    • 2005
  • In this study, weight of evidence(WOE) technique based on the bayesian method was applied to estimate the groundwater yield characteristics in the Pocheon area in Kyungki-do. The ground water preservation depends on many hydrogeologic factors that include hydrologic data, landuse data, topographic data, geological map and other natural materials, even with man-made things. All these data can be digitally collected and managed by GIS database. In the applied technique of WOE, The prior probabilities were estimated as the factors that affect the yield on lineament, geology, drainage pattern or river system density, landuse and soil. We calculated the value of the Weight W+, W- of each factor and estimated the contrast value of it. Results by the ground water yield characteristic calculations were presented in the form of posterior probability map to the consideration of in-situ samples. It is concluded that this technique is regarded as one of the effective technique for the feasibility mapping related to detection of groundwater bearing zones and its spatial pattern.

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반도체 EDS공정에서의 패턴인식기법을 이용한 불량 유형 자동 분류 방법 연구 (Automatic classification of failure patterns in semiconductor EDS Test using pattern recognition)

  • 한영신;황미영;이칠기
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2003년도 하계종합학술대회 논문집 II
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    • pp.703-706
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    • 2003
  • Yield enhancement in semiconductor fabrication is important. It is ideal to prevent all the failures. However, when a failure occurs, it is important to quickly specify the cause stage and take countermeasure. The automatic method of failure pattern extraction from fail bit map provides reduced time to analysis and facilitates yield enhancement. This paper describes the techniques to automatically classifies a failure pattern using a fail bit map, a new simple schema which facilitates the failure analysis.

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Micromirror Array의 Yield 측정을 위한 방법 개발 (Development of automatic yield-test equipment for the Micromirror Array)

  • 조광우;김호성;신형재
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1998년도 하계학술대회 논문집 G
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    • pp.2547-2549
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    • 1998
  • Automatic yield-test equipment for micro mirror array using image processing was developed. This computerized test equipment can classify the error states of the micromirrors. The test results are displayed on the monitor as a map which shows the error states and position. It is possible to measure yield and reliability with this test equipment for micromirror array using image processing.

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