• JSTS:Journal of Semiconductor Technology and Science
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• 제16권6호
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• pp.754-759
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• 2016

A transformer feedback low-noise amplifier (LNA) is implemented in a standard $0.18{\mu}m$ CMOS process, which exploits drain-to-gate transformer feedback technique for wideband input matching and operates across entire 3~5 GHz ultra-wideband (UWB). The proposed LNA achieves power gain above 9.5 dB, input return loss less than 15.0 dB, and noise figure below 4.8 dB, while consuming 8.1 mW from a 1.8-V supply. To the authors' knowledge, drain-to-gate transformer feedback for wideband input matching cascode LNA is the first adopted technique for UWB application.

• Journal of electromagnetic engineering and science
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• 제5권3호
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• pp.112-116
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• 2005

This paper presents a broadband two-stage low noise amplifier(LNA) operating from 3 to 10 GHz, designed with 0.18 ${\mu}m$ RF CMOS technology, The cascode feedback topology and broadband matching technique are used to achieve broadband performance and input/output matching characteristics. The proposed UWB LNA results in the low noise figure(NF) of 3.4 dB, input/output return loss($S_{11}/S_{22}$) of lower than -10 dB, and power gain of 14.5 dB with gain flatness of $\pm$1 -dB within the required bandwidth. The input-referred third-order intercept point($IIP_3$) and the input-referred 1-dB compression point($P_{ldB}$) are -7 dBm and -17 dBm, respectively.

• ETRI Journal
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• 제27권5호
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• pp.569-578
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• 2005

The purpose of this paper is to describe the implementation of monolithically matching circuits, interface circuits, and RF core circuits to the same substrate. We designed and fabricated on-chip 1 to 6 GHz up-conversion and 1 to 8 GHz down-conversion mixers using a 0.8 mm SiGe hetero-junction bipolar transistor (HBT) process technology. To fabricate a SiGe HBT, we used a reduced pressure chemical vapor deposition (RPCVD) system to grow a base epitaxial layer, and we adopted local oxidation of silicon (LOCOS) isolation to separate the device terminals. An up-conversion mixer was implemented on-chip using an intermediate frequency (IF) matching circuit, local oscillator (LO)/radio frequency (RF) wideband matching circuits, LO/IF input balun circuits, and an RF output balun circuit. The measured results of the fabricated up-conversion mixer show a positive power conversion gain from 1 to 6 GHz and a bandwidth of about 4.5 GHz. Also, the down-conversion mixer was implemented on-chip using LO/RF wideband matching circuits, LO/RF input balun circuits, and an IF output balun circuit. The measured results of the fabricated down-conversion mixer show a positive power conversion gain from 1 to 8 GHz and a bandwidth of about 4.5 GHz.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2008년도 하계종합학술대회
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• pp.539-540
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• 2008

This paper presents an ultra-wideband (UWB) CMOS low noise amplifier (LNA) topology that operates in 3.1-10.6GHz band. The common gate structure provides wideband input matching and flattens the passband gain. The proposed UWB amplifier is implemented in 0.18 um CMOS technology for lower band operation mode. Simulation shows a minimum NF of 2.35 dB, a power gain of $18.3{\sim}20\;dB$, better than -10 dB of input and output matching, while consuming 16.4 mW.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2007년도 심포지엄 논문집 정보 및 제어부문
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• pp.193-194
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• 2007

This paper presents the design of a power amplifier for full-band UWB application systems using a CMOS 0..18um technology. A wideband RLC filter and a multilevel RLC matching scheme are utilized to achieve the wideband input/output matching. Both the cascade and cascode stage are used to increase the gain and to achieve gain flatness. Simulation results show that the designed amplifier provides a power gain greater than 10 dB throughout the UWB full-band(3.1-10.6GHz) and an input P1dB of -1.2dBm at 6.9GHz. It consumes 35.8mW from a 1.8V supply.

• ETRI Journal
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• 제38권5호
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• pp.972-980
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• 2016

An ultra-wideband microwave monolithic integrated circuit high-power amplifier with excellent input and output return losses for phased array jammer applications was designed and fabricated using commercial $0.25-{\mu}m$ AlGaN/GaN technology. To improve the wideband performance, resistive matching and a shunt feedback circuit are employed. The input and output return losses were improved through a balanced design using Lange-couplers. This three-stage amplifier can achieve an average saturated output power of 15 W, and power added efficiency of 10% to 28%, in a continuous wave operation over a frequency range of 6 GHz to 18 GHz. The input and output return losses were demonstrated to be lower than -15 dB over a wide frequency range.

• Journal of electromagnetic engineering and science
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• 제9권1호
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• pp.7-11
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• 2009

An Ultra-WideBand(UWB) Low-Noise Amplifier(LNA) is proposed and is implemented in a $0.18-{\mu}m$ CMOS technology. The proposed UWB LNA provides excellent wideband characteristics by combining a High-Pass Filter (HPF) with a conventional resistive-loaded LNA topology. In the proposed UWB LNA, the bell-shaped gain curve of the overall amplifier is much less dependent on the frequency response of the HPF embedded in the input stage. In addition, the adoption of fewer on-chip inductors in the input matching network permits a lower noise figure and a smaller chip area. Measurement results show a power gain of + 10 dB and an input return loss of more than - 9 dB over 2.7 to 6.2 GHz, a noise figure of 3.1 dB at 3.6 GHz and 7.8 dB at 6.2 GHz, an input PldB of - 12 dBm, and an IIP3 of - 0.2 dBm, while dissipating only 4.6 mA from a 1.8-V supply.

• 한국전자파학회논문지
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• 제26권7호
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• pp.620-626
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• 2015

본 논문에서는 2차 전역통과 필터를 이용하여 입력정합을 수행하고, LC 병렬공진 회로를 이용하여 트랜지스터의 출력 리액턴스를 최소화하는 기법을 적용함으로써 2~6 GHz에서 동작하는 광대역 GaN 전력증폭기 MMIC를 설계 및 제작하였다. 광대역 손실정합을 위해 사용된 2차 전역통과 필터는 트랜지스터의 채널 저항 효과를 보상하기 위해 비대칭적 구조를 사용하였다. Win Semiconductors사의 $0.25{\mu}m$ GaN HEMT 파운드리 공정으로 제작된 MMIC 칩은 크기가 $2.6mm{\times}1.3mm$이며, 주파수 대역 내에서 약 13 dB의 평탄한 이득 특성과 10 dB 이상의 우수한 입력정합 특성을 보였다. 포화출력 조건에서 측정된 출력전력은 2~6 GHz에서 38.6~39.8 dBm의 값을 보였고, 전력부가효율은 31.3~43.4 %을 나타내었다.

• 대한전자공학회논문지SD
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• 제44권12호
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• pp.77-84
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• 2007

본 논문에서는 $0.18{\mu}m$ CMOS 공정을 이용하여 서브샘플링 직접변환방식 RF 수신기용을 위한 광대역 저잡음 증폭기를 구현하였다. 인버터-형태의 트랜스임피던스 입력단과 3차의 Chebyshev 매칭네트워크를 사용함으로써, 제안한 광대역 저잡음 증폭기 회로는 5.35GHz의 대역폭, $12\sim18dB$의 전력이득, $6.9\sim10.8dB$의 NF, 대역폭 내에서의 -10dB 이하의 입력 임피던스 매칭과 -24dB 이하의 출력 임피던스 매칭을 얻었다. 제작한 칩은 1.8V 단일 전원전압으로 부터 32.4mW의 전력소모를 가지며, $0.56\times1.0mm^2$의 칩 사이즈를 갖는다.

• 전기전자학회논문지
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• 제23권3호
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• pp.917-924
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• 2019

This paper presents a wideband low noise amplifier (LNA) that is suitable for LTE-Advanced and 5G communication standards employing carrier aggregation (CA). The proposed LNA encompasses a common input stage and a dual output second stage with a buffer at each distinct output. This architecture is targeted to operate in both intra-band (contiguous and non-contiguous) and inter-band CA. In the proposed design, the input and second stages employ a gm enhancement with resistive feedback technique to achieve self-biasing, enhanced gain, wide bandwidth as well as reduced noise figure of the proposed LNA. An up/down power controller controls the single input single out (SISO) and single input multiple outputs (SIMO) modes of operation for inter-band and intra-band operations. The proposed LNA is designed with a 45nm CMOS technology. For SISO mode of operation, the LNA operates from 0.52GHz to 4.29GHz with a maximum power gain of 17.77dB, 2.88dB minimum noise figure and input (output) matching performance better than -10dB. For SIMO mode of operation, the proposed LNA operates from 0.52GHz to 4.44GHz with a maximum voltage gain of 18.30dB, a minimum noise figure of 2.82dB with equally good matching performance. An $IIP_3$ value of -6.7dBm is achieved in both SISO and SIMO operations. with a maximum current of 42mA consumed (LNA+buffer in SIMO operation) from a 1.2V supply.