• Journal of the Korean housing association
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• v.14 no.6
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• pp.125-133
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• 2003

The purpose of this study is to reveal the characteristics of Kan as a compositional unit in relation with its usage, building base, structural system, and roofing system in Seo Baek Dang and Gwan Ga Jeong. The results are as follows： Seo Baek Dang and Gwan Ga Jeong share a common characteristics： Kan module forms the plan to be 1：1 in shape and enables flexibility in usage and regularity in compositional aspect. In Seo Baek Dang, there are active level differences in base, room floor levels and column heights to achieve intended roof design while minimizing the deviation of module (500 mm) of four sides enclosing the an-madang (inner courtyard) and, in Gwan Ga Jeong, instead of differentiating levels, maximizing the module control (up to 1,560 mm) and lowering the roof slope are found. They are regarded resulting in a rather plane manner. Through a comparative analysis, it is found out that these two houses have a common characteristics of Kan to form a quadrate plan while they have differences both in conceptual and tectonic manner that is 'how to build a house' in similar conditions of region, period and society. In addition, Kan as a module is clarified to have a relative value that regulates both structural and aesthetical aspects.

• Journal of the Korea Society of Computer and Information
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• v.20 no.2
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• pp.1-10
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• 2015

In this paper, we propose a new multiplication algorithm for primitive polynomial with all 1 of coefficient in case that m is odd and even on finite fields $GF(3^m)$, and design the multiplier with parallel input-output module structure using the presented multiplication algorithm. The proposed multiplier is designed $(m+1)^2$ same basic cells. Since the basic cells have no a latch circuit, the multiplicative circuit is very simple and is short the delay time $T_A+T_X$ per cell unit. The proposed multiplier is easy to extend the circuit with large m having regularity and modularity by cell array, and is suitable to the implementation of VLSI circuit.

• Korean Institute of Interior Design Journal
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• v.25 no.6
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• pp.3-14
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• 2016

According to Plato's ontology, we lead our lives by establishing a relationship with others in the society. However in rapidly changing era, our lives was gradually moving towards personal tendency. Even for the relationship with family, not with others. Thus, awareness about owning properties has changed due to the sociocultural factors and increase number of single-person households. So in this study, the considerations for single-person housing were perceived through preceding research, and the elements making spatial boundary of shared housing were drawn to make rational space sharing based on the boundary with others and of the living environment. With overall analysis based on the spatial boundary features of planned shared housing, the plan characteristics according to the spatial boundary of the current shared housing is to be drawn and analyzed. Third, The expressive and structural features of spatial boundary as above appear with mutual flexible connectivity, And the result shows that the modularity was the highest. Among them variable coupling modularity of shows how it is possible to combine efficiently and variously the private and public spaces with regularity of 'space of optimal unit'. This study drew plan characteristics from more detailed space border of shared housing. Therefore, The basic framework of the characteristics spin for the cases that newly emerge later on.

• Journal of Korea Multimedia Society
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• v.7 no.8
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• pp.1086-1096
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• 2004

In case of a multimedia application which deals with streaming data, in terms of cache management, cache loses its efficiency due to weak temporal locality of the data. This means that when data have been brought into cache, much of the data are supposed to be replaced without being accessed again during its service. However, there is a good chance that such multimedia data has a commanding locality in it. In this paper, to take advantage of the memory reference regularity which typically innates even in the multimedia data showing up its weak temporal locality, a method is suggested. The suggested method with the feature of dynamic regular-stride reference prefetching can identify for 2-dimensional array format(block pattern). The suggested method is named as block-reference-prediction-technique (BRPT) since it identifies a block pattern and place an address to be prefetched by the regulation of the block format. BRPT proved to be reassuring to reduce memory reference time significantly for applications having abundant block patterns although new rule has complicated the prefetching system even further.

• Journal of Korean Society of Transportation
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• v.22 no.4 s.75
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• pp.19-30
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• 2004

Due to the inefficient operation of the existing logistic facilities, the complicated distribution structure, and closed utilization of logistic information are causing high logistic costs. The general improvement in the distribution structure and the expansion of the logistic facilities are needed for solving these problems. However, existing unit-scale forecast is not considering the loading and unloading characteristics of the trucks and the improvement of operation efficiency from the mechanization and automation of the loading and unloading works. The queuing theory based on the status quo of the cargo trucks to the cargo terminals is considered in this study. The optimal scale estimation method(OSCM) which the loading and unloading characteristics of the cargo trucks were taken into consideration was suggested. Also, the relationship between the optimal scale of the cargo terminal and the mechanization, automation, and informationization of the present loading and unloading system was investigated. As a result, it showed that the regularity of the truck arrival and service times had less influence on the scale of the cargo terminal, but the improvement of the loading and unloading speeds and the service rate of the trucks did more influence on it.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.39 no.3
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• pp.191-200
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• 2002

In this paper, we present the method transforming the interval functions into the truncated difference functions for multi-variable multi-valued functions and implementing the truncated difference functions to the multiple valued logic circuits with uniform patterns using the current mirror circuits and the inhibit circuits by current-mode CMOS. Also, we apply the presented methods to the implementation of circuits for additive truth table of 2-variable 4-valued MOD(4) and multiplicative truth table of 2-variable 4-valued finite fields GF(4). These circuits are simulated under 2${\mu}{\textrm}{m}$ CMOS standard technology, 15$mutextrm{A}$ unit current, and 3.3V power supply voltage using PSpice. The simulation results have shown the satisfying current characteristics. Both implemented circuits using current-mode CMOS have the uniform Patterns and the regularity of interconnection. Also, it is expansible for the variables of multiple valued logic functions and are suitable for VLSI implementation.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.15 no.3
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• pp.510-520
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• 2011

In this paper, we propose a new multiplication algorithm for primitive polynomial with all 1 of coefficient in case that m is odd and even on finite fields $GF(3^m)$, and compose the multiplier with parallel input-output module structure using the presented multiplication algorithm. The proposed multiplier is designed $(m+1)^2$ same basic cells that have a mod(3) addition gate and a mod(3) multiplication gate. Since the basic cells have no a latch circuit, the multiplicative circuit is very simple and is short the delay time $T_A+T_X$ per cell unit. The proposed multiplier is easy to extend the circuit with large m having regularity and modularity by cell array, and is suitable to the implementation of VLSI circuit.

• Journal of the Korea Society of Computer and Information
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• v.18 no.2
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• pp.9-17
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• 2013

In this paper, we propose a new multiplication algorithm for two polynomials using primitive polynomial with all 1 of coefficient on finite fields GF($2^m$), and design the multiplier with high-speed parallel input-output module structure using the presented multiplication algorithm. The proposed multiplier is designed $m^2$ same basic cells that have a 2-input XOR gate and a 2-input AND gate. Since the basic cell have no a latch circuit, the multiplicative circuit is very simple and is short the delay time $D_A+D_X$ per cell unit. The proposed multiplier is easy to extend the circuit with large m having regularity and modularity by cell array, and is suitable to the implementation of VLSI circuit.

• Journal of KIISE:Computer Systems and Theory
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• v.31 no.9
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• pp.514-526
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• 2004

Microarray is a new technique for gene expression experiment, which has gained biologist's attention for recent years. This technology enables us to obtain hundreds and thousands of expression of gene or genotype at once using microarray Since it requires manual work to analyze patterns of gene expression, we want to develop an effective and automated tools to analyze microarray image. However it is difficult to analyze DNA chip images automatically due to several problems such as the variation of spot position, the irregularity of spot shape and size, and sample contamination. Especially, one of the most difficult problems in microarray analysis is the block and spot addressing, which is performed by manual or semi automated work in all the commercial tools. In this paper we propose a new algorithm to address the position of spot and block using a new concept of regular structure grid searching. In our algorithm, first we construct maximal I-regular sequences from the set of input points. Secondly we calculate the rotational angle and unit distance. Finally, we construct I-regularity graph by allowing pseudo points and then we compute the spot/block address using this graph. Experiment results showed that our algorithm is highly robust and reliable. Supplement information is available on http://jade.cs.pusan.ac.kr/~autogrid.

• Korean Journal of Remote Sensing
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• v.34 no.6_3
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• pp.1427-1443
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• 2018

Object-based image analysis (OBIA) allows higher computation efficiency and usability of information inherent in the image, as it reduces the complexity of the image while maintaining the image properties. Superpixel methods oversegment the image with a smaller image unit than an ordinary object segment and well preserve the edges of the image. SLIC (Simple linear iterative clustering) is known for outperforming the previous superpixel methods with high image segmentation quality. Although the input parameter for SLIC, number of superpixels has considerable influence on image segmentation results, impact analysis for SLIC parameter has not been investigated enough. In this study, we performed optimal parameter analysis and evaluation of change detection for SLIC-based superpixel techniques using KOMPSAT data. Forsuperpixel generation, three superpixel methods (SLIC; SLIC0, zero parameter version of SLIC; SNIC, simple non-iterative clustering) were used with superpixel sizes in ranges of $5{\times}5$ (pixels) to $50{\times}50$ (pixels). Then, the image segmentation results were analyzed for how well they preserve the edges of the change detection reference data. Based on the optimal parameter analysis, image segmentation boundaries were obtained from difference image of the bi-temporal images. Then, DBSCAN (Density-based spatial clustering of applications with noise) was applied to cluster the superpixels to a certain size of objects for change detection. The changes of features were detected for each superpixel and compared with reference data for evaluation. From the change detection results, it proved that better change detection can be achieved even with bigger superpixel size if the superpixels were generated with high regularity of size and shape.