• Title/Summary/Keyword: time-switching

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질소 첨가된 GeSe 비정질 칼코지나이드 박막을 이용한 OTS (Ovonic threshold switching) 소자의 switiching 특성 연구

  • An, Hyeong-U;Jeong, Du-Seok;Lee, Su-Yeon;An, Myeong-Gi;Kim, Su-Dong;Sin, Sang-Yeol;Kim, Dong-Hwan;Jeong, Byeong-Gi
    • Proceedings of the Materials Research Society of Korea Conference
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    • 2012.05a
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    • pp.78.2-78.2
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    • 2012
  • 최근 PRAM의 집적도 향상 및 3차원 적층에 의한 메모리 용량 향상을 위해 셀 선택 스위치로서 박막형 Ovonic Threshold Switching (OTS) 소자를 적용한 Cross bar 구조의 PRAM이 제안된 바 있다. OTS 소자는 비정질 칼코지나이드를 핵심층으로 하는 2단자 소자로서 고저항의 Off 상태에 특정 값 (문턱스위칭 전압) 이상의 전압을 가해주면 저저항의 On 상태로 바뀌고 다시 특정 값 (유지전압) 이하로 전압을 감소시킴에 따라 고저항의 Off 상태로 복원하는 특성을 갖는다. 셀 선택용 스위치로 적용되기 위해서는 핵심적으로 On-Off 상태간의 가역적인 변화 중에도 재료가 비정질 구조를 안정하게 유지해야 하며 전기적으로는 Off 상탱의 저항이 크고 또한 전류값의 점멸비가 커야 한다. GeSe는 이원계 재료로서 단수한 구성에도 불구하고 OTS 소자가 갖추어야할 기본적인 특성을 가지는 것으로 알려져 있다. 본 연구에서는 GeSe로 구성된 OTS 재료에 경원소인 질소를 첨가하여 비정질 상태의 안정성과 소자특성의 개선 효과를 조사하였다. RF-puttering 시 Ar과 $N_2$의 혼합 Gas를 사용하여 조성이 $Ge_{62}Se_{38}$ ($N_2$ : 3%)인 박막을 제작하여 DSC를 통해 결정화온도(Tx)를 확인하였고, $N_2$ gas의 함유량이 각각 1 %, 2 %, 3 %인 $Ge_{62}Se_{38}$인 박막을 전극의 접촉 부 면적이 $10{\times}10\;{\mu}m^2$인 cross-bar 구조의 소자로 제작하여 Threshold switching voltage ($V_{th}$), Delay time ($t_d$), $I_{on}/I_{off}$ 그리고 Endurance 특성을 평가하였다. DSC 분석 결과 $N_2$ 가 3 % 첨가된 GeSe 박막은 Tx가 $371^{\circ}C$에서 $399^{\circ}C$로 증가되었다. $N_2$가 1% 첨가된 GeSe 소자를 측정한 결과 $V_{th}$의 변화 없는 가운데 $I_{on}/I_{off}$이 약 $2{\times}10^3$에서 $5{\times}10^4$로 향상되었다. Endurance 특성 역시 $10^4$에서 $10^5$번으로 향상되었다. $t_d$의 경우 비정질 상태의 저항 증가로 인해 약 50% 증가되었다. 이러한 $N_2$의 첨가로 인한 비정질 GeSe 박막의 변화 원인에 대한 분석 결과를 소개할 예정이다.

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The Effect of Physical Environments in the Comprehensive Health Examination Center on Medical Service Value, Satisfaction and Switching Barrier (종합검진센터의 물리적 환경이 의료서비스가치와 만족도, 전환장벽에 미치는 영향)

  • Kim, YongTae;Chae, BongSik;Hwang, BokJu
    • Journal of Service Research and Studies
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    • v.9 no.4
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    • pp.63-80
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    • 2019
  • This study presents strategic implications for enhancing the competitiveness of the comprehensive health examination center through the study of its impact on the switching barrier with medical service value and medical service satisfaction as parameters. In order to achieve the purpose of this study, a total of 324 questionnaires were analyzed for customers who received health examinations at the general examination center. Covariance structure analysis was performed to test hypotheses and causal relationships. The results showed that the physical environment had a significant effect on the medical service value and medical service satisfaction. The value of medical service also had a significant effect on medical service satisfaction. The value of medical service was found to affect the transition barrier, but the satisfaction of medical service did not affect the transition barrier. The implications of this study are that physical environment has a significant effect on medical service value and medical service satisfaction. Therefore, modern medical equipment should be equipped with the latest medical equipment to minimize accurate examination and misdiagnosis through modernization of medical examination center. In addition, since the value of medical service has a significant effect on the switching barrier, it is necessary to establish a plan to enhance the value of medical service. We need to promote sustainable customer retention and creation of new customers through differentiated screening items and cost advantages over competitors. In addition to check-up services, efforts should be made to enhance the value of services such as strengthening medical communication and medical complex cultural spaces, and at the same time, establish an organizational culture of customer-first examination centers through the placement of excellent personnel and continuous education.

Framework Switching of Speaker Overlap Detection System (화자 겹침 검출 시스템의 프레임워크 전환 연구)

  • Kim, Hoinam;Park, Jisu;Cha, Shin;Son, Kyung A;Yun, Young-Sun;Park, Jeon Gue
    • Journal of Software Assessment and Valuation
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    • v.17 no.1
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    • pp.101-113
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    • 2021
  • In this paper, we introduce a speaker overlap system and look at the process of converting the existed system on the specific framework of artificial intelligence. Speaker overlap is when two or more speakers speak at the same time during a conversation, and can lead to performance degradation in the fields of speech recognition or speaker recognition, and a lot of research is being conducted because it can prevent performance degradation. Recently, as application of artificial intelligence is increasing, there is a demand for switching between artificial intelligence frameworks. However, when switching frameworks, performance degradation is observed due to the unique characteristics of each framework, making it difficult to switch frameworks. In this paper, the process of converting the speaker overlap detection system based on the Keras framework to the pytorch-based system is explained and considers components. As a result of the framework switching, the pytorch-based system showed better performance than the existing Keras-based speaker overlap detection system, so it can be said that it is valuable as a fundamental study on systematic framework conversion.

Mixed-mode simulation of transient characteristics of 4H-SiC DMOSFETs - Impact off the interface changes (Mixde-mode simulation을 이용한 4H-SiC DMOSFETs의 계면상태에서 포획된 전하에 따른 transient 특성 분석)

  • Kang, Min-Seok;Choe, Chang-Yong;Bang, Wook;Kim, Sang-Chul;Kim, Nam-Kyun;Koo, Sang-Mo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.11a
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    • pp.55-55
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    • 2009
  • Silicon Carbide (SiC) is a material with a wide bandgap (3.26eV), a high critical electric field (~2.3MV/cm), a and a high bulk electron mobility (${\sim}900cm^2/Vs$). These electronic properties allow high breakdown voltage, high frequency, and high temperature operation compared to Silicon devices. Although various SiC DMOSFET structures have been reported so far for optimizing performances. the effect of channel dimension on the switching performance of SiC DMOSFETs has not been extensively examined. In this paper, we report the effect of the interface states ($Q_s$) on the transient characteristics of SiC DMOSFETs. The key design parameters for SiC DMOSFETs have been optimized and a physics-based two-dimensional (2-D) mixed device and circuit simulator by Silvaco Inc. has been used to understand the relationship with the switching characteristics. To investigate transient characteristic of the device, mixed-mode simulation has been performed, where the solution of the basic transport equations for the 2-D device structures is directly embedded into the solution procedure for the circuit equations. The result is a low-loss transient characteristic at low $Q_s$. Based on the simulation results, the DMOSFETs exhibit the turn-on time of 10ns at short channel and 9ns at without the interface charges. By reducing $SiO_2/SiC$ interface charge, power losses and switching time also decreases, primarily due to the lowered channel mobilities. As high density interface states can result in increased carrier trapping, or recombination centers or scattering sites. Therefore, the quality of $SiO_2/SiC$ interfaces is important for both static and transient properties of SiC MOSFET devices.

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The Design of Single Phase PFC using a DSP (DSP를 이용한 단상 PFC의 설계)

  • Yang, Oh
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.44 no.6
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    • pp.57-65
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    • 2007
  • This paper presents the design of single phase PFC(Power Factor Correction) using a DSP(TMS320F2812). In order to realize the proposed boost PFC converter in average current mode control, the DSP requires the A/D sampling values for a line input voltage, a inductor current, and the output voltage of the converter. Because of a FET switching noise, these sampling values contain a high frequency noise and switching ripple. The solution of A/D sampling keeps away from the switching point. Because the PWM duty is changed from 5% to 95%, we can#t decide a fixed sampling time. In this paper, the three A/D converters of the DSP are started using the prediction algorithm for the FET ON/OFF time at every sampling cycle(40 KHz). Implemented A/D sampling algorithm with only one timer of the DSP is very simple and gives the autostart of these A/D converters. From the experimental result, it was shown that the power factor was about 0.99 at wide input voltage, and the output ripple voltage was smaller than 5 Vpp at 80 Vdc output. Finally the parameters and gains of PI controllers are controlled by serial communication with Windows Xp based PC. Also it was shown that the implemented PFC converter can achieve the feasibility and the usefulness.

W 도핑된 ZnO 박막을 이용한 저항 변화 메모리 특성 연구

  • Park, So-Yeon;Song, Min-Yeong;Hong, Seok-Man;Kim, Hui-Dong;An, Ho-Myeong;Kim, Tae-Geun
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.02a
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    • pp.410-410
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    • 2013
  • Next-generation nonvolatile memory (NVM) has attracted increasing attention about emerging NVMs such as ferroelectric random access memory, phase-change random access memory, magnetic random access memory and resistance random access memory (RRAM). Previous studies have demonstrated that RRAM is promising because of its excellent properties, including simple structure, high speed and high density integration. Many research groups have reported a lot of metal oxides as resistive materials like TiO2, NiO, SrTiO3 and ZnO [1]. Among them, the ZnO-based film is one of the most promising materials for RRAM because of its good switching characteristics, reliability and high transparency [2]. However, in many studies about ZnO-based RRAMs, there was a problem to get lower current level for reducing the operating power dissipation and improving the device reliability such an endurance and an retention time of memory devices. Thus in this paper, we investigated that highly reproducible bipolar resistive switching characteristics of W doped ZnO RRAM device and it showed low resistive switching current level and large ON/OFF ratio. This may be caused by the interdiffusion of the W atoms in the ZnO film, whch serves as dopants, and leakage current would rise resulting in the lowering of current level [3]. In this work, a ZnO film and W doped ZnO film were fabricated on a Si substrate using RF magnetron sputtering from ZnO and W targets at room temperature with Ar gas ambient, and compared their current levels. Compared with the conventional ZnO-based RRAM, the W doped ZnO ReRAM device shows the reduction of reset current from ~$10^{-6}$ A to ~$10^{-9}$ A and large ON/OFF ratio of ~$10^3$ along with self-rectifying characteristic as shown in Fig. 1. In addition, we observed good endurance of $10^3$ times and retention time of $10^4$ s in the W doped ZnO ReRAM device. With this advantageous characteristics, W doped ZnO thin film device is a promising candidates for CMOS compatible and high-density RRAM devices.

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Design of an 8-Bit eFuse One-Time Programmable Memory IP Using an External Voltage (외부프로그램 전압을 이용한 8비트 eFuse OTP IP 설계)

  • Cho, Gyu-Sam;Jin, Mei-Ying;Kang, Min-Cheol;Jang, Ji-Hye;Ha, Pan-Bong;Kim, Young-Hee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.14 no.1
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    • pp.183-190
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    • 2010
  • We propose an eFuse one-time programmable (OTP) memory cell based on a logic process, which is programmable by an external program voltage. For the conventional eFuse OTP memory cell, a program datum is provided with the SL (Source Line) connected to the anode of the eFuse going through a voltage drop of the SL driving circuit. In contrast, the gate of the NMOS program transistor is provided with a program datum and the anode of the eFuse with an external program voltage (FSOURCE) of 3.8V without any voltage drop for the newly proposed eFuse cell. The FSOURCE voltage of the proposed cell keeps either 0V or the floating state at read mode. We propose a clamp circuit for being biased to 0V when the voltage of FSOURCE is in the floating state. In addition, we propose a VPP switching circuit switching between the logic VDD (=1.8V) and the FSOURCE voltage. The layout size of the designed eFuse OTP memory IP with Dongbu HiTek's $0.15{\mu}m$ generic process is $359.92{\times}90.98{\mu}m^2$.

Variable Sampling Window Flip-Flops for High-Speed Low-Power VLSI (고속 저전력 VLSI를 위한 가변 샘플링 윈도우 플립-플롭의 설계)

  • Shin Sang-Dae;Kong Bai-Sun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.8 s.338
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    • pp.35-42
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    • 2005
  • This paper describes novel flip-flops with improved robustness and reduced power consumption. Variable sampling window flip-flop (VSWFF) adjusts the width of the sampling window according to input data, providing robust data latching as well as shorter hold time. The flip-flop also reduces power consumption for higher input switching activities as compared to the conventional low-power flip-flop. Clock swing-reduced variable sampling window flip-flop (CSR-VSWFF) reduces clock power consumption by allowing the use of a small swing clock. Unlike conventional reduced clock swing flip-flops, it requires no additional voltage higher than the supply voltage, eliminating design overhead related to the generation and distribution of this voltage. Simulation results indicate that the proposed flip-flops provide uniform latency for narrower sampling window and improved power-delay product as compared to conventional flip-flops. To evaluate the performance of the proposed flip-flops, test structures were designed and implemented in a $0.3\mu m$ CMOS process technology. Experimental result indicates that VSWFF yields power reduction for the maximum input switching activity, and a synchronous counter designed with CSR-VSWFF improves performance in terms of power consumption with no use of extra voltage higher than the supply voltage.

Torque shaping for near-minimum-time optimal slewing of 3-axis spacecraft (3축 위성체의 준최소시간 선회기동을 위한 입력형상최적화)

  • 김기석;김희섭;김유단
    • 제어로봇시스템학회:학술대회논문집
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    • 1997.10a
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    • pp.1330-1333
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    • 1997
  • In this paper, the optimal torque shaping is obtained for 3-axis rotation of a spacecraft. The true optimal 3-axis rotation of rigid spaeraft is first investigated via parameter optimization method with prescribed switching times. Input torque shape of the troque generating device mounted on the central hub is optimized using fourier Series expansion so that the spacecraft may slew while minimizing the vibration energy of flexible modes. Numerical results show that proposed method suggests a reference trahectory for open-loop control, and also verify that it can minimize the vibratory modes of the spacecraft during/after the rest-to-rest maneuver.

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Delay Fairness Using the Burst Assembly for Service Differentiation

  • Vo, Viet Minh Nhat;Le, Van Hoa;Le, Manh Thanh
    • ETRI Journal
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    • v.40 no.3
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    • pp.347-354
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    • 2018
  • Using various offset times to separate differential services is the most common form of service differentiation in optical burst switching networks. In this approach, a larger offset time is given to a higher priority burst, but it causes this burst to have a longer delay. One solution to this problem is to adjust the burst assembly time so that the buffering delay of the higher priority burst is always shorter than that of the lower priority burst. However, this adjustment causes another problem, called delay unfairness, for bursts with differential priorities that share the same path to their destination. This article proposes a new solution for delay fairness using the burst assembly.