• 한국정보디스플레이학회:학술대회논문집
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• 2004.08a
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• pp.198-201
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• 2004

We have developed a multi-domain vertically aligned liquid crystal display (MVA-LCD) that produces natural gray-scale images even at high viewing angles. We divided each pixel into two areas and set different threshold voltages for each sub-area. A transparent electrode in a sub-area is not connected directly to the source electrodes but via the capacitance of the SiN layer. In particular, light-orange skin color appears very natural, even at a high inclination angle. The contrast ratio is over 500 in the normal direction and over 10 from any viewing angle.

• JSTS:Journal of Semiconductor Technology and Science
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• v.8 no.2
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• pp.134-138
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• 2008

We present a power gating turn-on mechanism that digitally suppresses ground-bounce noise in ultra-deep submicron technology. Initially, a portion of the sleep transistors are switched on in a pseudo-random manner and then they are all turned on fully when VVDD is above a certain reference voltage. Experimental results from a realistic test circuit designed in 65nm bulk CMOS technology show the potential of our approach.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.5 no.4
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• pp.840-855
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• 2011

In the context of additive noise steganography model, we propose a method to detect least significant bit (LSB) matching steganography in grayscale images. Images are decomposed into detail sub-bands with local linear transform (LLT) masks which are sensitive to embedding. Novel normalized characteristic function features weighted by a bank of band-pass filters are extracted from the detail sub-bands. A suboptimal feature set is searched by using a threshold selection algorithm. Extensive experiments are performed on four diverse uncompressed image databases. In comparison with other well-known feature sets, the proposed feature set performs the best under most circumstances.

• Ocean Systems Engineering
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• v.2 no.1
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• pp.17-31
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• 2012

This study investigated the behavior of a non-isothermal $CO_2$ bubble formed through a leak process from a high-pressure source in a deep sea. Isenthalpic interpretation was employed to predict the state of the bubble just after the leak. Three modes of mass loss from the rising bubble were demonstrated: dissolution induced by mass transfer, condensation by heat transfer and phase separation by pressure decrease. A graphical interpretation of the last mode was provided in the pressure-enthalpy diagram. A threshold pressure (17.12 bar) was identified below which the last mode was no longer present. The second mode was as effective as the first for a bubble formed in deep water, leading to faster mass loss. To the contrary, only the first mode was active for a bubble formed in a shallow region. The third mode was insignificant for all cases.

• Ocean Systems Engineering
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• v.2 no.1
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• pp.33-47
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• 2012

This study revealed the behavior of droplets formed through leak process in deep water. There was a threshold depth named the universal attraction depth (UAD). Droplets rose upward in the zone below the UAD called the rising zone, and settled down in the zone above the UAD called the settling zone. Three mass loss modes were identified and formulated: dissolution induced by mass transfer, condensation by heat transfer and phase separation by pressure decrease. The first two were active for the settling zone, and all the three were effective for the rising zone. In consequence, the life time of the droplets in the rising zone was far shorter than that of the droplets in the settling zone.

• JSTS:Journal of Semiconductor Technology and Science
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• v.17 no.1
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• pp.94-100
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• 2017

Stress drain bias dependent current model is proposed for sub-70-nm p-channel metal-oxide semiconductor field-effect transistors (pMOSFETs) under drain-avalanche-hot-carrier (DAHC-) mechanism. The proposed model describes the both on-current and off-current degradation by using two device parameters: channel length variation (${\Delta}L_{ch}$) and threshold voltage shift (${\Delta}V_{th}$). Also, it is a simple and effective model of predicting reliable circuit operation and standby power consumption.

• Nuclear Engineering and Technology
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• v.52 no.3
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• pp.614-620
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• 2020

In a previous study, delayed hydride cracking (DHC) assessment of pressurized water reactor (PWR) spent fuel during dry storage using the threshold stress intensity factor (K_IH) was performed. However, there were a few limitations in the analysis of the cladding properties, such as oxide thickness and mechanical properties. In this study, those models were modified to include test data for irradiated materials, and the cladding creep model was introduced to improve the reliability of the DHC assessment. In this study, DHC susceptibility of PWR spent fuel during dry storage depending on the axial elevation was evaluated with the improved assessment methodology. In addition, the sensitivity of affecting parameters such as fuel burnup, hydride thickness, and crack aspect ratio are presented.

• JSTS:Journal of Semiconductor Technology and Science
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• v.5 no.2
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• pp.136-147
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• 2005

A theoretical design evaluation based on a hydrodynamic transport simulation of strained Si-SiGe on insulator (SSOI) type nMOSFETs is reported. Although, the net performance improvement is quite limited by the short channel effects, simulation results clearly show that the strained Si-SiGe type nMOSFETs are well-suited for gate lengths down to 20 nm. Simulation results show that the improvement in the transconductance with decreasing gate length is limited by the long-range Coulomb scattering. An influence of lateral and vertical diffusion of shallow dopants in the source/drain extension regions on the device performance (i.e., threshold voltage shift, subthreshold slope, current drivability and transconductance) is quantitatively assessed. An optimum layer thickness ($t_{si}$ of 5 and $t_{sg}$ of 10 nm) with shallow Junction depth (5-10 nm) and controlled lateral diffusion with steep doping gradient is needed to realize the sub-50 nm gate strained Si-SiGe type nMOSFETs.

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.6
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• pp.647-654
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• 2013

The design and analysis of analog circuit application on CMOS technology are a challenge in deep sub-micrometer process. This paper is a study on the performance value of Double Gate (DG) Metal Oxide Semiconductor Field Effect Transistor (MOSFET) with Gate Stack and the channel engineering Single Halo (SH), Double Halo (DH). Four different structures have been analysed keeping channel length constant. The short channel parameters and different sub-threshold analog figures of merit (FOMs) are analysed. This work extensively provides the device structures which may be applicable for high speed switching and low power consumption application.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2009.01a
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• pp.278-281
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• 2009

In this paper, we propose a fast partial distortion algorithm using normalized dithering matching scan to get uniform distribution of partial distortion which can reduce only unnecessary computation significantly. Our algorithm is based on normalized dithering order matching scan and calibration of threshold error using LOG value for each sub-block continuously for efficient elimination of unlike candidate blocks while keeping the same prediction quality compared with the full search algorithm. Our algorithm reduces about 60% of computations for block matching error compared with conventional PDE (partial distortion elimination) algorithm without any prediction quality, and our algorithm will be useful to real-time video coding applications using MPEG-4 AVC or MPEG-2.