• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.47 no.2
• /
• pp.100-105
• /
• 2010

In this paper, a FM radio receiver integrated circuit has been developed based on $0.5{\mu}m$ CMOS process for Zero-Crossing FM demodulator over the 88MHz to 108MHz band. The receiver is designed with the low-IF architecture, and includes Low Noise Amplifier(LNA), Down-Conversion Mixer, Phase Locked Loop(PLL), IF LPF, and a comparator. The measured results of the LNA and Mixer show that the conversion gain of 23.2 dB, the input PldB of -14 dBm, and the noise figure of 15 dB. The measured analog block of the LPF and comparator show the voltage gain of over 89 dB, and the IF LPF can configure the passband from 600KHz to 1.3MHz with 100KHz step through the internal control register banks. The designed FM radio receiver operates at 4.5V with the total current consumption of 15.3mA, so the total power consumption is about 68.85mW. The commercial FM radio has been successfully received.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.11 no.2
• /
• pp.95-103
• /
• 2011

This paper proposes a 6b 1.2 GS/s 47.8 mW 0.17 $mm^2$ 65 nm CMOS ADC for high-rate wireless personal area network systems. The proposed ADC employs a source follower-free flash architecture with a wide input range of 1.0 $V_{p-p}$ at a 1.2 V supply voltage to minimize power consumption and high comparator offset effects in a nanometer CMOS technology. The track-and-hold circuits without source followers, the differential difference amplifiers with active loads in pre-amps, and the output averaging layout scheme properly handle a wide-range input signal with low distortion. The interpolation scheme halves the required number of pre-amps while three-stage cascaded latches implement a skew-free GS/s operation. The two-step bubble correction logic removes a maximum of three consecutive bubble code errors. The prototype ADC in a 65 nm CMOS demonstrates a measured DNL and INL within 0.77 LSB and 0.98 LSB, respectively. The ADC shows a maximum SNDR of 33.2 dB and a maximum SFDR of 44.7 dB at 1.2 GS/s. The ADC with an active die area of 0.17 $mm^2$ consumes 47.8 mW at 1.2 V and 1.2 GS/s.

• Journal of the Korean Vacuum Society
• /
• v.6 no.2
• /
• pp.103-108
• /
• 1997

Silicon field emitter arrays (FEAs) have been fabricated by a novel method employing a two-step tip etch and a spin-on-glass (SOG) etch-back process using double layered thermal/tetraethylortho-silicate (TEOS) oxides as a gate dielectric. A partial etching was performed by coating a low viscous photo resist and $O_2$ plasma ashing on order to form the double layered gate dielectric. A small gate aperture with low gate leakage current was obtained by the novel process. The hight and the end radius of the fabricated emitter was about 1.1 $\mu\textrm{m}$ and less than 100$\AA$, respectively. The anode emission current from a 256 tips array was turned-on at a gate voltage of 40 V. Also, the gate current was less than 0.1% of the anode current.

• Progress in Superconductivity and Cryogenics
• /
• v.14 no.4
• /
• pp.20-23
• /
• 2012

Superconducting equipment has been actively investigated for securing the environment and energy technology (ET) in various parts of the world. Despite these movements, a high voltage cryogenic bushing, which plays an important role of interconnection between the electric power systems and superconducting devices, has not been fully developed due to severe insulation requirements. A gas insulated cryogenic bushing has been investigated as one of our projects since 2010. As a basic step to obtain the design parameters for cryogenic bushing, we focused on the surface flashover characteristics of glass fiber reinforced plastic (FRP) in several insulation gases. For the surface flashover tests, several insulation gases including $SF_6$, $CF_4$ and $N_2$ gas were prepared. Various length of FRP specimens were fabricated in order to obtain the fundamental data for creepage distance of FRP. The first specimen group was from 2 mm to 10 mm with 2 mm intervals and the second specimen group was from 20 mm to 100 mm with 20 mm intervals. And the gas pressure was varied from 1 bar to 4 bar. An AC overvoltage test and a lightning impulse test were performed. Then the experimental results of surface flashover were obtained and analyzed. Based on these results, it would be possible to design the optimum creepage distance of FRP in a cryogenic bushing.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.41 no.2
• /
• pp.244-253
• /
• 2016

The QRS complex of ECG signal represents the depolarization and repolarization activities in the cells of ventricle. Accurate informations of $QRS_{onset}$ and $QRS_{offset}$ are needed for automatic analysis of ECG waves. In this study, using the amount of change in the QRS complex voltage values and the distance from the $R_{peak}$, we determined the junction point from Q-wave to R-wave and the junction point from R-wave to S-wave. In the next step, using the integral calculation based on the connection point, we detected $QRS_{onset}$ and $QRS_{offset}$. We use the PhysioNet QT database to evaluate the performances of the algorithm, and calculate the mean and standard deviation of the differences between onsets or offsets manually marked by cardiologists and those detected by the proposed algorithm. The experiment results show that standard deviations are under the tolerances accepted by expert physicians, and outperform the results obtained by the other algorithms.

• Proceedings of the KIEE Conference
• /
• 2006.07c
• /
• pp.1550-1551
• /
• 2006

An L-band linear accelerator system for e-beam sterilization is under design for bio-technology application. The klystron-modulator system as RF microwave source has an important role as major components to offer the system reliability for long time steady state operation. A PFN line type pulse generator with a peak power of 71.5-MW, $7{\mu}s$, 285 pps is required to drive a high-power klystron. The high power pulse transformer has a function of transferring pulse energy from a pulsed power source to a high power load. The pulse transformer producing a pulse with a peak voltage of 275 kV is required to produce 30-MW peak and 60 kW average RF output power at the frequency of 1.3-GHz. We have designed the high power pulse transformer with 1:13 step-up ratio. The peak and average power capability is 71.5-MW (275 kV, 260 A at load side with $7{\mu}s$ pulse width) and 130 kW, respectively. In this paper, we present a system overview and initial design results of the high power pulse transformer.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.28 no.10
• /
• pp.665-669
• /
• 2015

We investigated and compared two methods of in-situ oxidation and chemical etching treatment (CET) to remove the boron rich layer (BRL). The BRL is generally formed during boron doping process. It has to be controlled in order not to degrade carrier lifetime and reduce electrical properties. A boron emitter is formed using $BBr_3$ liquid source at $930^{\circ}C$. After that, in-situ oxidation was followed by injecting oxygen of 1,000 sccm into the furnace during ramp down step and compared with CET using a mixture of acid solution for a short time. Then, we analyzed passivation effect by depositing $Al_2O_3$. The results gave a carrier lifetime of $110.9{\mu}s$, an open-circuit voltage ($V_{oc}$) of 635 mV at in-situ oxidation and a carrier lifetime of $188.5{\mu}s$, an $V_{oc}$ of 650 mV at CET. As a result, CET shows better properties than in-situ oxidation because of removing BRL uniformly.

• Journal of Power Electronics
• /
• v.15 no.2
• /
• pp.555-566
• /
• 2015

A TRIAC dimming LED driver that can control the brightness of LED arrays for a wide range of source voltage variations is proposed in this paper. Unlike conventional PWM LED drivers, the proposed LED driver adopts a TRIAC switch, which inherently guarantees zero current switching and has been proven to be quite reliable over its long lifetime. Unlike previous TRIAC type LED drivers, the proposed LED driver is composed of an LC input filter and a variable switched capacitance, which is modulated by the TRIAC turn-on timing. Thus, the LED power regulation and dimming control, which are done by a volume resistor in the same way as the conventional TRIAC dimmers, can be simultaneously performed by the TRIAC control circuit. Because the proposed LED driver has high efficiency and a long lifetime with a high power factor (PF) and low total harmonic distortion (THD) characteristics, it is quite adequate for industrial lighting applications such as streets, factories, parking garages, and emergency stairs. A simple step-down capacitive power supply circuit composed of passive components only is also proposed, which is quite useful for providing DC power from an AC source without a bulky and heavy transformer. A prototype 60 W LED driver was implemented by the proposed design procedure and verified by simulation and experimental results, where the efficiency, PF, and THD are 92%, 0.94, and 6.3%, respectively. The LED power variation is well mitigated to below ${\pm}2%$ for 190 V < $V_s$ < 250 V by using the proposed simple control circuit.

• Journal of Power Electronics
• /
• v.17 no.3
• /
• pp.821-834
• /
• 2017

This paper reports on a single-inductor multiple-output step-up converter with digital control. A systematic analog-to-digital-controller design is explained. The number of digital blocks in the feedback path of the proposed converter has been decreased. The simpler digital pulse-width modulation (DPWM) architecture is then utilized to reduce the power consumption. This architecture has several advantages because counters and a complex digital design are not required. An initially designed unit-delay cell is adopted recursively for the construction of coarse, intermediate, and fine delay blocks. A digital limiter is then designed to allow only useful code for the DPWM. The input voltage is 1.8 V, whereas output voltages are 2 V and 2.2 V. A co-simulation was also conducted utilizing PowerSim and Matlab/Simulink, whereby the 55 nm process was employed in the experimental results to evaluate the performance of the architecture.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.26 no.3
• /
• pp.232-239
• /
• 2013

Thin light-active layers of the $CuInSe_2$ solar cell were prepared on Mo-coated sodalime glass substrates by one-step electrodeposition and post-annealing. The structure, morphology, and composition of $CuInSe_2$ film could be controlled by deposition parameters, such as the composition of metallic precursors, the concentration of complexing agents, and the temperature of post-annealing with elemental selenium. A dense and uniform Cu-poor $CuInSe_2$ film was successfully obtained in a range of parametric variation of electrodeposition with a constant voltage of -0.5 V vs. a Ag/AgCl reference electrode. The post-annealing of the film at high temperature above $500^{\circ}C$ induced crystallization of $CuInSe_2$ with well-developed grains. The KCN-treatment of the annealed $CuInSe_2$ films further induced Cu-poor $CuInSe_2$ films without secondary phases, such as $Cu_2Se$. The structure, morphology, and composition of $CuInSe_2$ films were compared with respect to the conditions of electrodeposition and post-annealing using SEM, XRD, Raman, AES and EDS analysis. And the conditions for preparing device-quality $CuInSe_2$ films by electrodeposition were proposed.