• 제목/요약/키워드: silicon diode

검색결과 232건 처리시간 0.027초

Graphite상의 ZnO Nanorod성장과 그를 이용한 Schottky Diode 제작

  • 남광희;백성호;박일규
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
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    • pp.421.2-421.2
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    • 2014
  • We report on the growth of ZnO nanorods (NRs) grown on graphite and silicon substrates via an all-solution process and characteristics of their heterojunctions. Structural investigations indicated that morphological and crystalline properties were not significantly different for the ZnO NRs on both substrates. However, optical properties from photoluminescence spectra showed that the ZnO NRs on graphite substrate contained more point defects than that on Si substrate. The ZnO NRs on both substrates showed typical rectification properties exhibiting successful diode formation. The heterojunction between the ZnO NRs and the graphite substrate showed a Schottky diode characteristic and photoresponse under ultraviolet illumination at a small reverse bias of -0.1 V. The results showed that the graphite substrate could be a good candidate for a Schottky contact electrode as well as a conducting substrate for electronic and optoelectronic applications of ZnO NRs.

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SIPOS를 이용한 SOI RESURF 다이오드의 항복전압 특성 (Breakdown Voltage Characterization of SOI RESURF Diode Using SIPOS)

  • 신동구;한승엽;최연익;정상구
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1997년도 하계학술대회 논문집 C
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    • pp.1621-1623
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    • 1997
  • The breakdown voltage of SOI RESURF (REduce SURface Field) diode using a SIPOS (Semi Insulating POlycrystalline Silicon) layer is verified in terms of n-drift layer length and surface oxide thickness by device simulator MEDICI, and compared with conventional SOI RESURF diode. Increasing the n-drift layer length, the breakdown voltage of SOI RESURF diode using the SIPOS layer have increased and saturated at $8{\mu}m$. And it has decreased with increasing the surface oxide thickness.

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붕소 이온주입에 의한 $p^{+}n$ 접합 다이오드에 관한 연구 (A study on $P^{+}N$ junction diode by boron implantation)

  • 김동수;정원채
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2000년도 추계종합학술대회 논문집(2)
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    • pp.225-228
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    • 2000
  • In this paper, we demonstrated an analytical description method of forward voltage drop and reverse voltage of $P^{+}N$ junction diode with <111> oriented antimony doped silicon wafer 60keV boron implantation computer simulation results. In order to make electrical activation of implanted carriers, thermal annealing are carried out by RTP method for 1min at $1000^{\circ}C$ inert gas condition.

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다공성 실리콘의 제조 및 특성에 관한 연구 (Fabrication and Characteristics of Porous Silicon)

  • 이철환;조원일;백지흠;박성용;안춘호;유종훈;조병원;윤경석
    • 한국표면공학회지
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    • 제28권3호
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    • pp.182-191
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    • 1995
  • A highly porous silicon layer was fabricated by anodizing single crystalline silicon in a dilute solution of hydrofluoric acid. The color of the porous silicon changed from red and blue to yellow gold during the anodizing process. The current-voltage (I-V) curve of the anodizing process showed a typical Schottky diode rectification form. The cell voltage decreased with the increase of HF concentration in the solution at high current range. However, the voltage was independent on HF concentration in the solution at low current range. The pore size was dependant on anodizing condition (HF concentration, current and anodizing time). The pore size and wall width of porous silicon layer were 4~6 and 1~3 nm, respectively. Surface of the porous silicon was covered with silicon compound ($SiH_x$etc.) according to IR spectrum analysis. The peak wavelength and width of photoluminescence (PL) spectrum of porous silicon were 650~850 nm (1.5~1.9 eV) and 250 nm, respectively. The photoluminescence intensity and peak wavelength, and porosity of porous silicon increased with increasing anodizing current and decreased with increasing HF concentration in the anodizing solution.

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이중 필드플레이트 기술을 이용한 4H-SiC 쇼트키 장벽 다이오드 (4H-SiC Schottky Barrier Diode Using Double-Field-Plate Technique)

  • 김태완;심슬기;조두형;김광수
    • 전자공학회논문지
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    • 제53권7호
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    • pp.11-16
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    • 2016
  • 탄화규소(Silicon Carbide)는 와이드 밴드 갭 물질로써 실리콘(Si)에 비해 고전력, 고주파, 고온 소자용 반도체 물질로서 각광받고 있다. 탄화규소를 이용하여 만든 반도체 소자 중 특히 쇼트키 배리어 다이오드는 현재 가장 많이 사용되는 전력반도체 소자로써 스위칭 속도가 매우 빠르고 낮은 온저항 특성을 가지는 소자이다. 하지만 컨텍 엣지에서의 전계집중으로 인해 항복전압이 낮아지는 단점이 있다. 이를 해결하기 위해 다양한 엣지 터미네이션 기술이 제안되고 있는데, 본 논문에서는 최적의 항복전압을 갖기 위한 이중 필드 플레이트(Double Field Plate) 소자 구조를 제안하였다. 측정결과 제작한 소자는 온저항을 유지한 채 38% 향상된 항복전압을 나타내었다. 제안한 소자 특성 검증을 위해 소자를 설계 및 제작한 후 전기적 특성을 측정하였으며, 이중 필드 플레이트 구조는 길이와 두께가 서로 다른 필드 플레이트를 겹쳐 올림으로써 구현하였다.

LED Encapsulation을 위한 스태틱 믹서의 전산 설계 및 유동해석을 이용한 액상 실리콘의 혼합 특성에 대한 연구 (A Study on the Computational Design of Static Mixer and Mixing Characteristics of Liquid Silicon Rubber using Fluidic Analysis for LED Encapsulation)

  • 조용규;하석재;호소;조명우;최종명;홍승민
    • Design & Manufacturing
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    • 제7권1호
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    • pp.55-59
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    • 2013
  • A Light Emitting Diode(LED) is a semiconductor device which converts electricity into light. LEDs are widely used in a field of illumination, LCD(Liquid Crystal Display) backlight, mobile signals because they have several merits, such as low power consumption, long lifetime, high brightness, fast response, environment friendly. In general, LEDs production does die bonding and wire bonding on board, and do silicon and phosphor dispensing to protect LED chip and improve brightness. Then lens molding process is performed using mixed liquid silicon rubber(LSR) by resin and hardener. A mixture of resin and hardener affect the optical characteristics of the LED lens. In this paper, computational design of static mixer was performed for mixing of liquid silicon. To evaluate characteristic of mixing efficiency, finite element model of static mixer was generated, and fluidic analysis was performed according to length of mixing element. Finally, optimal condition of length of mixing element was applied to static mixer from result of fluidic analysis.

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Comparison of Conventional DC-DC Converter and a Family of Diode-Assisted DC-DC Converter in Renewable Energy Applications

  • Zhang, Yan;Liu, Jinjun;Ma, Xiaolong;Feng, Junjie
    • Journal of Power Electronics
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    • 제14권2호
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    • pp.203-216
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    • 2014
  • In the conventional dc-dc converter, a pair of additional diode and the adjacent passive component capacitor/inductor can be added to the circuit with an X-shape connection, which generates a family of new topologies. The novel circuits, also called diode-assisted dc-dc converter, enhance the voltage boost/buck capability and have a great potential for high step-up/step-down power conversions. This paper mainly investigates and compares conventional dc-dc converter and diode-assisted dc-dc converter in wide range power conversion from the aspects of silicon devices, passive components requirements, electro-magnetic interference (EMI) and efficiency. Then, a comprehensive comparison example of a high step-up power conversion system was carried out. The two kinds of boost dc-dc converters operate under the same operation conditions. Mathematical analysis and experiment results verify that diode-assisted dc-dc converters are very promising for simultaneous high efficiency and high step-up/step-down power conversion in distributed power supply systems.

Novel Punch-through Diode Triggered SCR for Low Voltage ESD Protection Applications

  • Bouangeune, Daoheung;Vilathong, Sengchanh;Cho, Deok-Ho;Shim, Kyu-Hwan;Leem, See-Jong;Choi, Chel-Jong
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제14권6호
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    • pp.797-801
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    • 2014
  • This research presented the concept of employing the punch-through diode triggered SCRs (PTTSCR) for low voltage ESD applications such as transient voltage suppression (TVS) devices. In order to demonstrate the better electrical properties, various traditional ESD protection devices, including a silicon controlled rectifier (SCR) and Zener diode, were simulated and analyzed by using the TCAD simulation software. The simulation result demonstrates that the novel PTTSCR device has better performance in responding to ESD properties, including DC dynamic resistance and capacitance, compared to SCR and Zener diode. Furthermore, the proposed PTTSCR device has a low reverse leakage current that is below $10^{-12}$ A, a low capacitance of $0.07fF/mm^2$, and low triggering voltage of 8.5 V at $5.6{\times}10^{-5}$ A. The typical properties couple with the holding voltage of 4.8 V, while the novel PTTSCR device is compatible for protecting the low voltage, high speed ESD protection applications. It proves to be good candidates as ultra-low capacitance TVS devices.

I-V and C-V measurements or fabricated P+/N junction mode in Antimony doped (111) Silicon

  • Jung, Won-Chae
    • Transactions on Electrical and Electronic Materials
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    • 제3권2호
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    • pp.10-15
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    • 2002
  • In this paper, the electrical characteristics of fabricated p+-n junction diode are demonstrated and interpreted with different theoretical calculations. Dopants distribution by boron ion implantation on silicon wafer were simulated with TRIM-code and ICECaEM simulator. In order to make electrical activation of implanted carriers, thermal annealing treatments are carried out by RTP method for 1min. at $1000^{circ}C$ under inert $N_2$ gas condition. In this case, profiles of dopants distribution before and after heat treatments in the substrate are observed from computer simulations. In the I-V characteristics of fabricated diodes, an analytical description method of a new triangular junction model is demonstrated and the results with calculated triangular junction are compared with measured data and theoretical calculated results of abrupt junction. Forward voltage drop with new triangular junction model is lower than the case of abrupt junction model. In the C-V characteristics of diode, the calculated data are compared with the measured data. Another I-V characteristics of diodes are measured after proton implantation in electrical isolation method instead of conventional etching method. From the measured data, the turn-on characteristics after proton implantation is more improved than before proton implantation. Also the C-V characteristics of diode are compared with the measured data before proton implantation. From the results of measured data, reasonable deviations are showed. But the C-V characteristics of diode after proton implantation are deviated greatly from the calculated data because of leakage currents in defect regions and layer shift of depletion by proton implantation.

VDH이온주입기에 의한 실리콘 $p^+$-n-$n^+$접합의 새로운 형성법에 관한 연구 (A new formation method of silicon $p^+$-n-$n^+$junctions by VDH-implanter)

  • 최원은
    • 전기의세계
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    • 제22권5호
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    • pp.5-11
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    • 1973
  • A new method of forming silicon p$^{+}$-n-n$^{+}$ junctions has been attempted by using the VDH-Implanter (Vacuum Discharge and Heating). Each of p$^{+}$-n and n-n$^{+}$ junctions was formed on both sides of an n-type silicon substrate by means of predeposition of each dopant and their bombarding due to rarefied air ions together with the preheating of the substrate in the implanter. The recifying principle of the p$^{+}$-n-n$^{+}$ junctions is thought to be based on the theory of double injection. The I-V characteristic of the diode has shown that it has a fairly high forward current density with the desirable rise due to vary low voltage though the reverse voltage is a little low on account of the low resistivity of the silicon substrate.n substrate.

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