• Journal of KIISE
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• v.44 no.6
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• pp.566-572
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• 2017

As NAND flash storage is being widely used, its simulation methodologies have been studied in various aspects such as performance, reliability, and endurance. As a result, there have been advances in NAND flash storage simulation for both functional modeling and timing modeling. However, in addition to these advances, there is a need to drastically reduce the long simulation time that is required to evaluate the aging effect on flash storage. This paper proposes a so-called multi-core scalable real-time flash storage simulation method, which can control the simulation speed according to the user's preference. According to this method, it is possible to speed up the simulation in proportion to the number of CPU cores arbitrarily given while guaranteeing the correctness of the simulation result. Using our simulator implemented in the form of the Linux kernel module, we demonstrate the multi-core scalability and correctness of the proposed method.

• Proceedings of the Korea Contents Association Conference
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• 2009.05a
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• pp.810-815
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• 2009

In recent years, embedded systems such as cellular phones, Portable Multimedia Player, intelligent appliance, automobile engine control are reshaping the way people live, work, and play. Thereby, applications for embedded systems become increasingly sophisticated and complicated, such embedded computing platforms must use real-time operating systems (RTOSs) with time determinism. These RTOSs must not only provide predictable services but must also be efficient and small in size and it's kernel services should also be deterministic by specifying how long each service call will take to execute. Having this information allows the application developers to better plan their real-time application software so as not to miss the deadline of each task. In this paper, we present the complete generalized algorithm using multi-dimensional methodology to determine the highest priority in the ready list with 2r levels of priorities for an arbitrary integer number of r.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.19 no.1
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• pp.71-79
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• 2009

Currently much research is being done on host based intrusion detection using system calls which is a portion of kernel based data. Sequence based and frequency based preprocessing methods are mostly used in research for intrusion detection using system calls. Due to the large amount of data and system call types, it requires a significant amount of preprocessing time. Therefore, it is difficult to implement real-time intrusion detection systems. Despite this disadvantage, the frequency based method which requires a relatively small amount of preprocessing time is usually used. This paper proposes an effective method for detecting denial of service attacks using the frequency based method. Principal Component Analysis(PCA) will be used to select the principle system calls and a bayesian network will be composed and the bayesian classifier will be used for the classification.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.53 no.1
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• pp.1-9
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• 2004

In this paper, we proposed a hardware(H/W) structure which can compress and recontruct the input image in real time operation and implemented it into a FPGA platform using VHDL(VHSIC Hardware Description Language). All the image processing element to process both compression and reconstruction in a FPGA were considered each of them was mapped into a H/W with the efficient structure for FPGA. We used the DWT(discrete wavelet transform) which transforms the data from spatial domain to the frequency domain, because use considered the motion JPEG2000 as the application. The implemented H/W is separated to both the data path part and the control part. The data path part consisted of the image processing blocks and the data processing blocks. The image processing blocks consisted of the DWT Kernel for the filtering by DWT, Quantizer/Huffman Encoder, Inverse Adder/Buffer for adding the low frequency coefficient to the high frequency one in the inverse DWT operation, and Huffman Decoder. Also there existed the interface blocks for communicating with the external application environments and the timing blocks for buffering between the internal blocks. The global operations of the designed H/W are the image compression and the reconstruction, and it is operated by the unit or a field synchronized with the A/D converter. The implemented H/W used the 54％(12943) LAB(Logic Array Block) and 9％(28352) ESB(Embedded System Block) in the APEX20KC EP20K600CB652-7 FPGA chip of ALTERA, and stably operated in the 70MHz clock frequency. So we verified the real time operation. that is. processing 60 fields/sec(30 frames/sec).

• KIISE Transactions on Computing Practices
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• v.21 no.3
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• pp.173-182
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• 2015

Motion control systems are widely deployed in various industrial automation processes. The motion controller, which is a key element of motion control systems, has stringent real-time constraints. The controller must provide a short and deterministic control message transmission cycle, and minimize the actuation deviation among motor drives. To meet these requirements, hardware-based proprietary controllers have been prevalent. However, since it is becoming difficult for such an approach to meet increasing needs of system interoperability and scalability, nowadays, software-based universal motion controllers are regarded as their substitutes. Recently, embedded motion controller solutions are gaining attention due to low cost and relatively high performance. In this paper, we designed and implemented an embedded motion controller on an ARM-based evaluation board by using Xenomai real-time kernel and other open source software components. We also measured and analyzed the performance of our embedded controller under a realistic test-bed environment. The experimental results show that our embedded motion controller can provide relatively deterministic performance with synchronized control of three motor axis at 2 ms control cycle.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.3 no.4
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• pp.35-42
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• 2010

This paper reviews the current studies about the current secure OS, security module and SELinux, and suggests Linux access control module that uses the user discriminating authentication, security authority inheritance of subjects and objects, reference monitor and MAC class process and real-time audit trailing using DB. First, during the user authentication process, it distinguishes the access permission IP and separates the superuser(root)'s authority from that of the security manager by making the users input the security level and the protection category. Second, when the subjects have access to the objects through security authority inheritance of subjects and objects, the suggested system carries out the access control by comparing the security information of the subjects with that of the objects. Third, this system implements a Reference Monitor audit on every current events happening in the kernel. As it decides the access permission after checking the current MAC security attributes, it can block any malicious intrusion in advance. Fourth, through the real-time audit trailing system, it detects all activities in the operating system, records them in the database and offers the security manager with the related security audit data in real-time.

• The KIPS Transactions:PartA
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• v.16A no.6
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• pp.463-472
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• 2009

Real-time operating systems must have satisfying various conditions such as effective scheduling policies, minimized interrupt delay, resolved priority inversion problems, and its applications to be completed within desired deadline. The real-time operating systems, therefore, should be designed and developed to be optimal for these requirements. MicroC/OS-II, a kind of Real-time operating systems, uses the basic priority inheritance with a mutex to solve priority inversion problems. For the implementation of mutex, the kernel in an operating system should provide supports for numerous tasks with same priority. However, MicroC/OS-II does not provide this support for the numerous tasks of same priority. To solve this problem, MicroC/OS-II cannot but using priority reservation, which leads to the waste of unnecessary resources. In this study, we have dealt with new design a protocol, so called TPSP(Temporary Priority Swap Protocol), by an effective solution for above-mentioned problem, eventually enabling embedded systems with constrained resources environments to run applications.

• Journal of Korea Spatial Information System Society
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• v.3 no.1 s.5
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• pp.27-36
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• 2001

The 4S represents four systems that are commonly related to spatial information: GIS, GNSS, SIIS, ITS. The 4S technology that integrates the four systems gets more and more interests recently. In this paper, we adopt component paradigm to 4S system, apply it to the disaster control field, and design a system based on component architecture. There are many application areas to which the 4S technology can be applied. but the disaster control system is one of the most typical fields. We apply 4S technology to the disaster control fields, including fire, flood, and typhoon. Because of the characteristics of disaster control system that handles large-volume map data, component-based 4S system will take considerable effects on the improvement of disaster control works. The core functions that are common to all disaster control fields are included in 4S kernel component because of the consideration of time performance. Remaining non-common functions are implemented as separate components named as work-specific components. In our suggested system, a vehicle named as 4S-Van collects real-time information on the spot of disaster and sends image and location information to control center via wireless transmission. The control center analyzes the information together with its own spatial database or map, which was not possible in the conventional disaster control works. The control center can get desired information by sending a request of re-transmission to 4S-Van. Such method of real-time transmission supported by on-the-spot information makes the current situation judgment, decision making, and order issuance more exact, effective, and timely. The suggested system and method are expected to bring remarkable improvement on disaster control works.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.1 no.1
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• pp.41-51
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• 2002

As Advanced Traveler Information System(ATIS) is the kernel of the Intelligent Transportation System, it is very important how to manage data from traffic information collectors on a road and have at borough grip of the travel time's change quickly and exactly for doing its part. Link travel time can be obtained by two method. One is measured by area detection systems and the other is estimated by point detection systems. Measured travel time by area detection systems has the limitation for real time information because it Is calculated by the probe which has already passed through the link. Estimated travel time by point detection systems is calculated by the data on the same time of each. section, this is, it use the characteristic of the various cars of each section to estimate travel time. For this reason, it has the difference with real travel time. In this study, Artificial Neural Networks is used for estimating link travel time concerned about the relationship with vehicle detector data and link travel time. The method of estimating link travel time are classified according to the kind of input data and the Absolute value of error between the estimated and the real are distributed within 5$\~$15minute over 90 percent with the result of testing the method using the vehicle detector data and AVI data of Namsan Tunnel $\#$1. It also reduces Time lag of the information offered time and draws late delay generation and dissolution.

• Structural Engineering and Mechanics
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• v.67 no.6
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• pp.643-658
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• 2018

In this paper, we introduce a new framework for running the finite element (FE) packages inside an online Loop together with MATLAB. Contrary to the Hardware-in-the-Loop techniques (HiL), in the proposed Software-in-the-Loop framework (SiL), the FE package represents a simulation platform replicating the real system which can be out of access due to several strategic reasons, e.g., costs and accessibility. Practically, SiL for sophisticated structural design and multi-physical simulations provides a platform for preliminary tests before prototyping and mass production. This feature may reduce the new product's costs significantly and may add several flexibilities in implementing different instruments with the goal of shortlisting the most cost-effective ones before moving to real-time experiments for the civil and mechanical systems. The proposed SiL interconnection is not limited to ABAQUS as long as the host FE package is capable of executing user-defined commands in FORTRAN language. The focal point of this research is on using the compiled FORTRAN subroutine as a messenger between ABAQUS/CAE kernel and MATLAB Engine. In order to show the generality of the proposed scheme, the limitations of the available SiL schemes in the literature are addressed in this paper. Additionally, all technical details for establishing the connection between FEM and MATLAB are provided for the interested reader. Finally, two numerical sub-problems are defined for offline and online post-processing, i.e., offline optimization and closed-loop system performance analysis in control theory.