Acknowledgement
Supported by : 한국연구재단
References
- N. Agrawal, et al., "Design Tradeoffs for SSD Performance," USENIX Annual Technical Conference, pp. 57-70, 2008.
- G. Aayush, et al., "DFTL: A Flash Translation Layer Employing Demand-based Selective Caching of Page-level Address Mappings," Proc. of the 14th International Conference on Architectural Support for Programming Languages and Operating Systems, pp. 229-240, 2009.
- Y. Kim, et al., "Flashsim: A Simulator for NAND Flash-based Solid-state Drives," Advances in System Simulation, pp. 125-131, 2009.
- M. Jung, et al., "NANDFlashSim: High-Fidelity, Microarchitecture-Aware NAND Flash Memory Simulation," ACM Transactions on Storage, Vol. 12, No. 2, Article No. 6, 2016.
- E. Nam, et al., "Ozone (O3): An Out-of-order Flash Memory Controller Architecture," IEEE Transactions on Computers, Vol. 60, No. 5, pp. 653-666, 2011. https://doi.org/10.1109/TC.2010.209
- J. Shin, et al., "Copycat: A High Precision Real Time NAND Simulator," arXiv preprint arXiv:1612. 04277, 2016.
- J. Yoo, et al., "VSSIM: Virtual Machine Based SSD Simulator," Mass Storage Systems and Technologies (MSST), 2013 IEEE 29th Symposium on IEEE, pp. 1-14, 2013.
- F. Bellard, (2007), "QEMU Open Source Processor Emulator," Available: http://www.qemu.org (downloaded 2017, Feb. 28).
- K. Cho, Effective Performance Evaluation Framework for NAND Flash Memory Based Storage System (M.S. Thesis), Seoul National University, 2016. (in Korean)
- N. Binkert, et al., "The Gem5 Simulator," ACM SIGARCH Computer Architecture News, Vol. 39, No. 2, pp. 1-7, 2011.
- M. Herlihy and N. Shavit, The Art of Multiprocessor Programming, pp. 223-244, Morgan Kaufmann, Burlington, 2011.