• Journal of information and communication convergence engineering
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• v.16 no.3
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• pp.166-172
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• 2018

A pseudo-random sequence generated by using a primitive polynomial, trace function, and Legendre symbol has been researched in our previous work. Our previous sequence has some interesting features such as period, autocorrelation, and linear complexity. A pseudo-random sequence widely used in cryptography. However, from the aspect of the practical use in cryptographic systems sequence needs to generate swiftly. Our previous sequence generated by utilizing a primitive polynomial, however, finding a primitive polynomial requires high calculating cost when the degree or the characteristic is large. It’s a shortcoming of our previous work. The main contribution of this work is to find some relation between the generated sequence and irreducible polynomials. The purpose of this relationship is to generate the same sequence without utilizing a primitive polynomial. From the experimental observation, it is found that there are (p - 1)/2 kinds of polynomial, which generates the same sequence. In addition, some of these polynomials are non-primitive polynomial. In this paper, these relationships between the sequence and the polynomials are shown by some examples. Furthermore, these relationships are proven theoretically also.

• Convergence Security Journal
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• v.18 no.4
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• pp.27-33
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• 2018

Stream cipher is an one-time-pad type encryption algorithm that encrypt plaintext using simple operation such as XOR with random stream of bits (or characters) as symmetric key and its security depends on the randomness of used stream. Therefore we can design more secure stream cipher algorithm by using mathematical analysis of the stream such as period, linear complexity, non-linearity, correlation-immunity, etc. The key stream in stream cipher is generated in linear feedback shift register(LFSR) having characteristic polynomial. The primitive polynomial is the characteristic polynomial which has the best security property. It is used widely not only in stream cipher but also in SEED, a block cipher using 8-degree primitive polynomial, and in Chor-Rivest(CR) cipher, a public-key cryptosystem using 24-degree primitive polynomial. In this paper we present the concept and various properties of primitive polynomials in Galois field and prove the theorem finding the number of irreducible polynomials and primitive polynomials over $F_p$ when p is larger than 2. This kind of research can be the foundation of finding primitive polynomials of higher security and developing new cipher algorithms using them.

• Communications of the Korean Mathematical Society
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• v.32 no.1
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• pp.1-6
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• 2017

In this paper, the fundamental theorem of Galois Theory is used to generalize cyclotomic polynomials and construct irreducible polynomials associated with the n-th primitive roots of unity.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.38 no.1
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• pp.27-34
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• 2001

The multiplication algorithm using the primitive irreducible trinomial $x^m+x+1$ over $GF(2^m)$ was proposed by Mastrovito. The multiplier proposed in this paper consisted of the multiplicative operation unit, the primitive irreducible operation unit and mod operation unit. Among three units mentioned above, the Primitive irreducible operation was modified to primitive irreducible trinomial $x^m+x+1$ that satisfies the range of 1$x^m,{\cdots},x^{2m-2}\;to\;x^{m-1},{\cdots},x^0$ is reduced. In this paper, the primitive irreducible polynomial was reduced to the primitive irreducible trinomial proposed. As a result of this reduction, the primitive irreducible trinomial reduced the size of circuit. In addition, the proposed design of multiplier was suitable for VLSI implementation because the circuit became regular and modular in structure, and required simple control signal.

• Korean Journal of Mathematics
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• v.27 no.2
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• pp.465-474
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• 2019

Let ${\mathbb{Z}}$ be the ring of integers and ${\mathbb{Z}}[X]$ (resp., $h({\mathbb{Z}})$) be the ring of polynomials (resp., Hurwitz polynomials) over ${\mathbb{Z}}$. In this paper, we study the irreducibility of Hurwitz polynomials in $h({\mathbb{Z}})$. We give a sufficient condition for Hurwitz polynomials in $h({\mathbb{Z}})$ to be irreducible, and we then show that $h({\mathbb{Z}})$ is not isomorphic to ${\mathbb{Z}}[X]$. By using a relation between usual polynomials in ${\mathbb{Z}}[X]$ and Hurwitz polynomials in $h({\mathbb{Z}})$, we give a necessary and sufficient condition for Hurwitz polynomials over ${\mathbb{Z}}$ to be irreducible under additional conditions on the coefficients of Hurwitz polynomials.

• Bulletin of the Korean Mathematical Society
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• v.59 no.6
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• pp.1511-1522
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• 2022

Let H be a subgroup of $\mathbb{Z}^*_n$ (the multiplicative group of integers modulo n) and h₁, h₂, …, h_l distinct representatives of the cosets of H in $\mathbb{Z}^*_n$. We now define a polynomial J_n,H(x) to be $$J_{n,H}(x)=\prod^l_{j=1} \left( x-\sum_{h{\in}H} {\zeta}^{h_jh}_n\right)$$, where ${\zeta}_n=e^{\frac{2{\pi}i}{n}}$ is the nth primitive root of unity. Polynomials of such form generalize the nth cyclotomic polynomial $\Phi_n(x)={\prod}_{k{\in}\mathbb{Z}^*_n}(x-{\zeta}^k_n)$ as J_n,{1}(x) = Φ_n(x). While the nth cyclotomic polynomial Φ_n(x) is irreducible over ℚ, J_n,H(x) is not necessarily irreducible. In this paper, we determine the subgroups H for which J_n,H(x) is irreducible over ℚ.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.31B no.3
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• pp.60-68
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• 1994

In this paper, the multiplicative algorithm of two polynomials over finite field GF(($p^{m}$) is presented. Using the presented algorithm, the multiple-valued multiplier of the serial input-output modular structure by CCD is constructed. This multiple-valued multiplier on CCD is consisted of three operation units: the multiplicative operation unit, the modular operation unit, and the primitive irreducible polynomial operation unit. The multiplicative operation unit and the primitive irreducible operation unit are composed of the overflow gate, the inhibit gate and mod(p) adder on CCD. The modular operation unit is constructed by two mod(p) adders which are composed of the addition gate, overflow gate and the inhibit gate on CCD. The multiple-valued multiplier on CCD presented here, is simple and regular for wire routing and possesses the property of modularity. Also. it is expansible for the multiplication of two elements on finite field increasing the degree mand suitable for VLSI implementation.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.6
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• pp.117-123
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• 2014

This paper proposes the constructing method of effective multiplier using basis transformation. Th proposed multiplier is composed of the standard-dual basis transformation circuit module to change one input into dual basis the operation module to generate from bm to bm+k by the m degree irreducible polynomial, and the polynomial multiplicative module to consist of $m^2$ AND and m(m-1) EX-OR gates. Also, the dual-standard basis transformation circuit module to change the output part to be shown as a dual basis into standard basis is composed. The operation modules to need in each operational part are defined.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.2
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• pp.70-75
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• 2016

This paper proposes the constructing method of effective multiplier based on the finite fields in case of P=2. The proposed multiplier is constructed by polynomial arithmetic part, mod F(${\alpha}$) part and modular arithmetic part. Also, each arithmetic parts can extend according to m because of it have modular structure, and it is adopted VLSI because of use AND gate and XOR gate only. The proposed multiplier is more compact, regularity, normalization and extensibility compare with earlier multiplier. Also, it is able to apply several fields in recent hot issue IoT configuration.

• Journal of the Korea Society of Computer and Information
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• v.20 no.2
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• pp.1-10
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• 2015

In this paper, we propose a new multiplication algorithm for primitive polynomial with all 1 of coefficient in case that m is odd and even on finite fields $GF(3^m)$, and design the multiplier with parallel input-output module structure using the presented multiplication algorithm. The proposed multiplier is designed $(m+1)^2$ same basic cells. Since the basic cells have no a latch circuit, the multiplicative circuit is very simple and is short the delay time $T_A+T_X$ per cell unit. The proposed multiplier is easy to extend the circuit with large m having regularity and modularity by cell array, and is suitable to the implementation of VLSI circuit.