• Title/Summary/Keyword: passive circuit

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Highly Miniaturized and Performed UWB Bandpass Filter Embedded into PCB with SrTiO3 Composite Layer

  • Cheon, Seong-Jong;Park, Jun-Hwan;Park, Jae-Yeong
    • Journal of Electrical Engineering and Technology
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    • v.7 no.4
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    • pp.582-588
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    • 2012
  • In this paper, a highly miniaturized and performed UWB bandpass filter has been newly designed and implemented by embedding all the passive elements into a multi-layered PCB substrate with high dielectric $SrTiO_3$ composite film for 3.1 - 4.75 GHz compact UWB system applications. The high dielectric composite film was utilized to increase the capacitance densities and quality factors of capacitors embedded into the PCB. In order to reduce the size of the filter and avoid parasitic EM coupling between the embedded filter circuit elements, it was designed by using a $3^{rd}$ order Chebyshev circuit topology and a capacitive coupled transformation technology. Independent transmission zeros were also applied for improving the attenuation of the filter at the desired stopbands. The measured insertion and return losses in the passband were better than 1.68 and 12 dB, with a minimum value of 0.78 dB. The transmission zeros of the measured response were occurred at 2.2 and 5.15 GHz resulting in excellent suppressions of 31 and 20 dB at WLAN bands of 2.4 and 5.15 GHz, respectively. The size of the fabricated bandpass filter was $2.9{\times}2.8{\times}0.55(H)mm^3$.

Study on the Rectifier Circuits for Wireless Energy Transmission (무선 에너지 전송을 위한 정류회로에 관한 연구)

  • Shin, Doo-Soub;Seo, Chul-Hun
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.48 no.2
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    • pp.90-94
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    • 2011
  • In this paper, the energy transfer is associated with high frequency band and try to analysis the rectifier circuit structure and characteristics and find ways to maximum efficiency. Input signal at 13.56MHz is converted output DC signal with the experiments and measurements. Rectifier cirsuits can be divided into the half-wave, full-wave, bridge rectifier circuit. Research to the present with the passive components are carried out with a focus on efficiency improvements. Factors affecting the efficiency of rectification is dependent on the characteristics of the device. In this experiment, about 70% efficiency can be measured. By using an improved device for high efficiency could be obtained higher efficiency.

The development of piezoelectric smart panels for wide range transmission noise reduction (광대역 전달 소음저감을 위한 지능패널의 개발)

  • Lee, Joong-Kuen;Kim, Jae-Hwan;Cheong, Chae-Cheon;Kang, Young-Kyu
    • Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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    • 2000.06a
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    • pp.1273-1279
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    • 2000
  • A new concept of piezoelectric smart panels for noise reduction in wide band frequencies is proposed and their possibility is experimentally investigated. The proposed panels are based on active and passive methods. They use piezoelectric smart structure technology for active noise reduction at low band frequencies and passive sound absorbing materials for mid-range of noise frequencies. To prove the concept of piezoelectric smart panels, an acoustic measurement experiment was performed. The smart panels exhibit a good noise reduction in middle and high frequency ranges due to the mass effects of absorbing materials or/and the air gap. The use of piezoelectric smart panel renders noise reduction large at resonance frequency. Another concept of smart panel that uses piezoelectric damping is experimentally investigated. Since piezoelectric dampings can reduce vibration and noise at resonance frequencies with simple shunt circuit, they have merits in terms of economy and simplicity. Dissipated energy method(DEM) is adopted to tune the shunt circuit precisely in piezoelectric dampings. Noise reduction at multiple resonance frequencies is demonstrated.

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A Study on the Embedded Capacitor for PCB (PCB용 임베디드 캐패시터에 관한 연구)

  • Hong, Soon-Kwan
    • Journal of the Institute of Electronics Engineers of Korea TE
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    • v.42 no.4
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    • pp.1-6
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    • 2005
  • Recently embedded passive technology which fabricate passive elements such as resistors and capacitors at the inner layer of PCB(Printed Circuit Board) is used to make high performance IT products. However, embedded capacitor has limit in full range circuit applications because of the low capacitance density. In this paper, a new embedded capacitor which has wrinkled electrodes and dielectric layer was proposed to overcome the limits. FEM(Finite Elements Method) technique was used to evaluate capacitance density of the wrinkled type embedded capacitor. Capacitance density of the wrinkled type embedded capacitor is larger than that of conventional planar type embedded capacitor by about 25.6%$\sim$39.6%. In case of thin film type embedded capacitor, proposed wrinkled structure has more enhanced effect on the capacitance density.

A Short Wavelength Transmission Line Employing Periodically Arrayed Capacitive Devices on MMIC (MMIC상에서 주기적으로 배치된 용량성 소자를 이용한 단파장 전송선로)

  • Jeong, Jang-Hyeon;Kang, Suk-Youb;Yun, Young
    • Journal of Advanced Marine Engineering and Technology
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    • v.34 no.6
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    • pp.840-845
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    • 2010
  • In this paper, short-wavelength transmission line employing periodically arrayed capacitive devices (PACD) structures were developed for application to a development of miniaturized on-chip passive components on GaAs monolithic microwave integrated circuit (MMIC). The transmission line employing PACD structure showed a wavelength much shorter than conventional microstrip line. Concretely, the wavelength of the transmission line employing PACD structure was 8 % of the conventional microstrip line on GaAs substrate at 5GHz. And It was 38% of the microstrip line employing PPGM at 5GHz. It was recognized that the basic characteristics of the transmission line employing PACD structure were investigated for application to the miniaturized passive on-chip components.

Passive Damping Enhancement of Composite Beam Using Piezo Ceramic Connected to External Electrical Networks (외부 회로가 연결된 압전 세라믹을 이용한 복합재 보의 수동 감쇠 개선)

  • Yang, Seung-Man;Kim, Do-Hyung;Han, Jae-Hung;Lee, In
    • Composites Research
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    • v.12 no.2
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    • pp.1-9
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    • 1999
  • The piezoelectric material connected to external electric networks possesses frequency dependent stiffness and loss factor which are also affected by the shunting circuit. The external electric networks are generally specialized for two shunting circuits: one is the case of a resistor alone and the other is the combination of a resistor and an inductor. For resistive shunting, the material properties exhibit frequency dependency similar to viscoelastic materials, but are much stiffer and more independent of temperature. Shunting with a resistor and inductor introduces an electrical resonance, which can change the characteristics of structural resonance optimally in a manner analogous to a PMD (proof mass damper). Passive damping enhancement of composite beam using piezoelectric material connected to external electrical networks is achieved and presented in this paper.

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Passive Power Factor Correnction Circuits for Electronic Ballasts using Voltage-Fed and Current-Fed Reconant Inverters (전압원 및 전류원 구동 공진형 인버터로 구성된 형광등용 전자식 안정기의 역률개선에 적합한 수동 역률개선 회로에 관한 연구)

  • Chae, Gyun;Ryoo, Tae-Ha;Cho, Gyu-Hyeong
    • The Transactions of the Korean Institute of Power Electronics
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    • v.4 no.6
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    • pp.515-522
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    • 1999
  • Several power factor correction(PFC) circuits are presented to achieve high PF electronic ballast for both v voltage-fed and current-f,어 ek'Ctronic ballast. The proposed PFC circuits use valley-fil[(VF) type DClink s stages modified from the conventional VF circuit to adopt the charge pumping method for PFC operations d during the valley intervals. In voltage-fed ballast, charge pump capacitors are connected with the resonant c capaCltor In current-fed type, the charge pump capacitors are connc'Ctc'Cl with the additional second따y-side of t the power transformer. The measured PF is higher than 0.99 and THD is about 10% for all proposed PFC c circuits. The lamp current CF is also acceptable in the proposed circuits. The proposed circuit is suitable for i implementing cost longrightarroweffective electronic ballast.

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CMOS Single Supply Op Amp IC Layout Design (CMOS 단일 전원 OP AMP IC 레이아웃 설계)

  • Jarng, Sun-Suk;Kim, Yu-Ri-Ae
    • Proceedings of the IEEK Conference
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    • 2005.11a
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    • pp.909-912
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    • 2005
  • According to miniaturization trend of rehabilitation medical equipment such as hearing aid, study to replace previous complex system with semiconductor SOC (System-on-Chip) chip becomes lively. In this study, after investigating of existent hearing aid performance in circuit design approach, low electric power consuming, single power supply (1.4V battery) CMOSS OP AMP was designed. Analog circuit design tools such as Hspice and Cadence were used for circuit simulation and implementing layout design. This study shows technical methods particularly for layout design. The work is done in pmos and nmos active element layout design in addition to passive element design such as resister, capacitor and inductor.

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Investigation of a Method for RF Circuits Analysis Based on Electromagnetic Topology

  • Park, Yoon-Mi;Chung, Young-Seek;Cheon, Chang-Yul;Jung, Hyun-Kyo
    • Journal of Electrical Engineering and Technology
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    • v.4 no.3
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    • pp.396-400
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    • 2009
  • In this paper, electromagnetic topology (EMT) was used to analyze the electromagnetic compatibility (EMC) of RF circuits including passive and active components. It is difficult to obtain usable results for problems relating to electromagnetic coupling in complex systems when using conventional numerical or experimental methods. Thus it is necessary to find a new methodology for analyzing EMC problems in complicated electromagnetic environments. In order to consider the nonlinear characteristics of active components, a SPICE diode model was used. A power detector circuit and the receiver circuit of a radio control (RC) car were analyzed and experimented in order to verify the validity of this method.

Input Capacitance Analysis of Three-port Flyback Inverter with Active Power Decoupling Circuit (3권선형 능동 전력 디커플링 기법을 적용한 플라이백 인버터의 입력 커패시턴스 분석)

  • oh, Min Seuk;Kim, Kyu Dong;Kim, Jun Gu;Lee, Tae Won;Jung, Yong Chae;Won, Chung Yuen
    • Proceedings of the KIPE Conference
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    • 2012.11a
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    • pp.137-138
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    • 2012
  • In this paper, three-port flyback inverter with Active Power Decoupling(APD) circuit is analyzed. Conventional flyback inverter with passive power decoupling circuit needs the electrolytic capacitor with large capacitance for decoupling between constant DC power and instantaneous AC power. However the electrolytic capacitor has low lifespan about 50000 to 100000 hours. So the active power decoupling techniques are applied to reduce input capacitance of flyback inverter. Thus the overall system can achieve smaller size and longer lifespan. Proposed three-port flyback inverter is verified by design optimization, simulation and experimental result.

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