• Title/Summary/Keyword: oxide/nitride

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Industrial Applications of Si-based Ceramics

  • Eichler, Jens
    • Journal of the Korean Ceramic Society
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    • v.49 no.6
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    • pp.561-565
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    • 2012
  • Due to their unique combination of properties, Si-based ceramics, such as silicon carbide (SiC), silicon nitride ($Si_3N_4$) and silicon oxide ($SiO_2$ as fused silica), have a range of industrial applications in fields such as the chemical industry, aluminum manufacturing, oil and gas production and solar cell production. For each materials group, examples of typical applications from various industry sectors are presented while taking into account the property fingerprint.

Study on Electric Charactreistics of Multi-dielectric Thin Films Using Amorphous Silicon (비정질 실리콘을 이용한 다층 유전 박막의 전기적 특성에 관한 연구)

  • 정희환;정관수
    • Journal of the Korean Vacuum Society
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    • v.3 no.1
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    • pp.71-76
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    • 1994
  • The electrical characteristics of the capacitor dielectric films of amorphous silicon-nit-ride-oxide(ANO) structures are compared with the capacitor dielectric films of oxide-nitride-oxide (ONO) structrues The electrical characteristics of ONO and ANO films were evaluated by high frequency(1 MHz) C-V high frequency C-V after constant voltage stree I-V TDDB and refresh time measurements. ANO films shows good electrical characteristics such as higher total charge to breakdown storage capacitance and longer refresh time than ONO films. Also it makes little difference that leakage current and flat band voltage shyift(ΔVfb)of ANO ana ONO films.

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A Study on the Reduction of Bird's Beak in the LOCOS Process (LOCOS 공정에서 새부리 크기 감소를 위한 연구)

  • 이찬용;박상민;윤석범;오환술
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.27 no.1
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    • pp.91-95
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    • 1990
  • We study the process for the reduction of bird's beak at LOCOS processing with changing the representative coefficients, oxide thickness, silicon nitride thickness, oxidetion temperature and field oxide thickness that induced the condition of bird'beak. In order to eliminate the gate oxide defects induced by selective oxidation, we used additional sacrific oxidatio. Finally we obtained the length of bird's beak to be 5000\ulcornerby SEM.

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A Study on the Reliability and Reproducibility of 571 CMP process (STI CMP 공정의 신뢰성 및 재현성에 관한 연구)

  • 정소영;서용진;김상용;이우선;장의구
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.07a
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    • pp.25-28
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    • 2001
  • Recently, STI(Shallow Trench Isolation) process has attracted attention for high density of semiconductor device as a essential isolation technology. Without applying the conventional complex reverse moat process, CMP(Chemical Mechanical Polishing) has established the Process simplification. However, STI-CMP process have various defects such as nitride residue, torn oxide defect, damage of silicon active region, etc. To solve this problem, in this paper, we discussed to determine the control limit of process, which can entirely remove oxide on nitride from the moat area of high density as reducing the damage of moat area and minimizing dishing effect in the large field area. We, also, evaluated the reliability and reproducibility of STI-CMP process through the optimal process conditions.

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Influence of Electron and Hole Distribution on 2T SONOS Embedded NVM

  • Choi, Woo Young;Kim, Da Som;Lee, Tae Ho;Kwon, Young Jun;Park, Sung-Kun;Yoon, Gyuhan
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.16 no.5
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    • pp.624-629
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    • 2016
  • The influence of electron and hole (EH) distribution on two-transistor (2T) silicon-oxide-nitride-oxide-silicon (SONOS) embedded nonvolatile memory (eNVM) is investigated in terms of reliability. As PE (program/erase) cycles are repeated, it is observed that the electron distribution in the nitride layer becomes wider. It leads to the EH distribution mismatch, which degrades the reliability of 2T SONOS eNVM.

Nonvolatile memory devices with oxide-nitride-oxynitride stack structure for system on panel of mobile flat panel display

  • Jung, Sung-Wook;Choi, Byeong-Deog;Yi, Jun-Sin
    • 한국정보디스플레이학회:학술대회논문집
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    • 2008.10a
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    • pp.911-913
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    • 2008
  • In this work, nonvolatile memory (NVM) devices for system on panel of flat panel display (FPD) were fabricated using low temperature polycrystalline silicon (LTPS) thin film transistor (TFT) technology with an oxide-nitride-oxynitride (ONOn) stack structure on glass. The results demonstrate that the NVM devices fabricated using the ONOn stack structure on glass have suitable switching characteristics for data storage with a low operating voltage, a threshold voltage window of more than 1.8 V between the programming and erasing (P/E) states after 10 years and its initial threshold voltage window (${\Delta}V_{TH}$) after $10^5$ P/E cycles.

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An Investigation of Locally Trapped Charge Distribution using the Charge Pumping Method in the Two-bit SONOS Cell

  • An, Ho-Myoung;Lee, Myung-Shik;Seo, Kwang-Yell;Kim, Byung-Cheul;Kim, Joo-Yeon
    • Transactions on Electrical and Electronic Materials
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    • v.5 no.4
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    • pp.148-152
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    • 2004
  • The direct lateral profile and retention characteristics of locally trapped-charges in the nitride layer of the two-bit polysilicon-oxide-nitride-oxide-silicon (SONOS) memory are investigated by using the charge pumping method. After charges injection at the drain junction region, the lateral diffusion of trapped charges as a function of retention time is directly shown by the results of the local threshold voltage and the trapped-charges quantities.

Back bias effects in the programming using two-step pulse injection (2 단계 펄스 주입을 이용한 프로그램 방법에서 백바이어스 효과)

  • An, Ho-Myoung;Zhang, Yong-Jie;Kim, Hee-Dong;Seo, Yu-Jeong;Kim, Tae- Geun
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2010.06a
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    • pp.258-258
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    • 2010
  • In this work, back bias effects in the program of the silicon-oxide-nitride-oxide-silicon (SONOS) cell using two-step pulse sequence, are investigated. Two-step pulse sequence is composed of the forward biases for collecting the electrons at the substrate terminal and back bias for injecting the hot electrons into the nitride layer. With an aid of the back bias for electron injection, we obtain a program time as short as 600 ns and an ultra low-voltage operation with a substrate voltage of -3 V.

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MOSFET Characteristics and Hot-Carrier Reliability with Sidewall Spacer and Post Gate Oxidation (Sidewall Spacer와 Post Gate Oxidation에 따른 MOSFET 특성 및 Hot Carrier 신뢰성 연구)

  • 이상희;장성근;이선길;김선순;최준기;김용해;한대희;김형덕
    • Proceedings of the IEEK Conference
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    • 1999.06a
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    • pp.243-246
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    • 1999
  • We studied the MOSFET characteristics and the hot-carrier reliability with the sidewall spacer composition and the post gate oxidation thickness in 0.20${\mu}{\textrm}{m}$ gate length transistor. The MOSFET with NO(Nitride+Oxide) sidewall spacer exhibits the large degradation of hot-carrier lifetime because there is no buffering oxide against nitride stress. When the post gate oxidation is skipped, the hot-carrier lifetime is improved, but GIDL (Gate Induced Drain Leakage) current is also increased.

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두께 및 굴절률 변화와 이중층 구조에 따른 Anti-Reflection Layer의 특성변화에 관한 연구

  • An, Si-Hyeon;Park, Cheol-Min;Jo, Jae-Hyeon;Jang, Gyeong-Su;Baek, Gyeong-Hyeon;Lee, Jun-Sin
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.02a
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    • pp.395-395
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    • 2011
  • 일반적으로 태양전지에서 anti-reflection layer는 조사되는 태양 광을 좀 더 많이 사용하기 위하여 nitride나 oxide와 같은 막을 표면에 형성한다. 본 연구는 이 anti-reflection으로 사용되는 nitride와 oxide의 각각의 두께와 굴절률 변화에 따른 특성변화를 SILVACO를 이용하여 전산모사하고 그 특성변화를 분석하였다. Anti-reflection layer가 없을 경우에는 조사된 빛에 따른 available photo current 활용이 낮았으며, 특히 그 경향은 단파장영역에서 두드러지게 나타났다. 따라서 anti-reflection layer의 최적화를 위해서 두께를 가변하여 available photo current를 분석하였으며, 각 물질의 굴절률 변화 및 이중층 구조의 anti-reflection layer를 형성하고 특성변화를 분석함으로써 최적화하였다.

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