• Journal of Service Research and Studies
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• v.13 no.2
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• pp.99-113
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• 2023

In a customer-based industry, customer retention is the competitiveness of a company, and improving customer retention improves the competitiveness of the company. Therefore, accurate prediction and management of potential dormant customers is paramount to increasing the competitiveness of the enterprise. In particular, there are numerous competitors in the domestic card industry, and the government is introducing an automatic closing system for dormant card management. As a result of these social changes, the card industry must focus on better predicting and managing potential dormant cards, and better predicting dormant customers is emerging as an important challenge. In this study, the Recurrent Neural Network (RNN) methodology was used to predict potential dormant customers in the card industry, and in particular, Long-Short Term Memory (LSTM) was used to efficiently learn data for a long time. In addition, to redefine the variables needed to predict dormant customers in the card industry, Unified Theory of Technology (UTAUT), an integrated technology acceptance theory, was applied to redefine and group the variables used in the model. As a result, stable model accuracy and F-1 score were obtained, and Hit-Ratio proved that models using LSTM can produce stable results compared to other algorithms. It was also found that there was no moderating effect of demographic information that could occur in UTAUT, which was pointed out in previous studies. Therefore, among variable selection models using UTAUT, dormant customer prediction models using LSTM are proven to have non-biased stable results. This study revealed that there may be academic contributions to the prediction of dormant customers using LSTM algorithms that can learn well from previously untried time series data. In addition, it is a good example to show that it is possible to respond to customers who are preemptively dormant in terms of customer management because it is predicted at a time difference with the actual dormant capture, and it is expected to contribute greatly to the industry.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.25 no.5
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• pp.329-333
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• 2012

For phase transition method, good record sensitivity, low heat radiation, fast crystallization and hi-resolution are essential. Also, a retention time is very important part for phase-transition. In our past papers, we chose composition of $Ge_1Se_1Te_2$ material to use a Se factor which has good optical sensitivity than conventional Sb. Sb/Ge-Se-Te thin films are fabricated and irradiated with UV light source to investigate a reversible phase change by Sb-doped condition. Because of Sb atoms, the Sb inserted sample showed better performance than conventional one. We should note that this novel one showed another possibility for phase-change random access memory.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.15 no.10
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• pp.831-837
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• 2002

Scaled SONOS transistors have been fabricated by 0.35$\mu\textrm{m}$ CMOS standard logic process. The thickness of stacked ONO(blocking oxide, memory nitride, tunnel oxide) gate insulators measured by TEM are 2.5 nm, 4.0 nm and 2.4 nm, respectively. The SONOS memories have shown low programming voltages of ${\pm}$8.5 V and long-term retention of 10-year Even after 2 ${\times}$ 10$\^$5/ program/erase cycles, the leakage current of unselected transistor in the erased state was low enough that there was no error in read operation and we could distinguish the programmed state from the erased states precisely The tight distribution of the threshold voltages in the programmed and the erased states could remove complex verifying process caused by over-erase in floating gate flash memory, which is one of the main advantages of the charge-trap type devices. A single power supply operation of 3 V and a high endurance of 1${\times}$10$\^$6/ cycles can be realized by the programming method for a flash-erased type EEPROM.

• Journal of Oriental Neuropsychiatry
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• v.8 no.1
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• pp.69-79
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• 1997

This study was conducted to find out the effects of Jowiseungchungtang on learning and memory of rats. For this purpose, the radial-arm maze was used. The results of the study were summarized as follows.1. It was shown that the rate of rats that met the learning criteria when performing the learning is that the control group amounted to 40.0% while the Jowiseungchungtang group did 73.3%. The other showed higher learning effect than the one but there was no statistical significance.2. In the retention test performed with rats that met the learning criteria, the frequency of errors made by the two groups was 3.33$\pm$2.25 times for the control group and 1.36$\pm$1.12 times for Jowisrungchungtang group. The other was remarkably lower than the one in the frequency of errors.In conclusion, the study suggested that the Jowiseungchungtang have an effect on improvement of learning and memory.

• Journal of the Korean Ceramic Society
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• v.46 no.4
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• pp.436-440
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• 2009

The structural and electrical properties of $Al_2O_3/La_2O_3/Al_2O_3$ (ALA) films using a tunnel oxide annealed at various temperatures were investigated. The program/erase properties of the ALA films using the tunnel oxide annealed at $600^{\circ}C$ were superior to others. The program/erase voltage and time of the ALA films using the tunnel oxide annealed at $600^{\circ}C$ were 11 V for 10 ms (program) and -11 V for 100 ms (erase), respectively, and the corresponding memory window was about 1.59 V. In the retention test, the $V_{th}$ distributions of all films were not changed up to about $10^4$ cycles. In this study, all data showed sufficient characteristics to be used in flash memory devices.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2008.10a
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• pp.604-607
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• 2008

In this study, p-channel silicon-oxide-nitride-oxide-silicon (SONOS) transistors are fabricated and characterized as an unit cell for NAND flash memory. The SONOS transistors are fabricated by $0.13{\mu}m$ low power standard logic process technology. The thicknesses of gate insulators are $20{\AA}$ for the tunnel oxide, $14{\AA}$ for the nitride layer, and $49{\AA}$ for the blocking oxide. The fabricated SONGS transistors show low programming voltage, fast erase speed, and relatively good retention and endurance.

• Journal of Physiology & Pathology in Korean Medicine
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• v.30 no.5
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• pp.347-354
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• 2016

This study evaluated the effects of Fructus Corni Officinalis water extract (FCE) on congnitive impairment and Aβ clearance induced by beta amyloid Aβ (1-42) injection in the hippocampus of rat. Aβ (1-42) was injected into the hippocampus using a Hamilton syringe and micropump (5 ㎍/5 ㎕, 1 ㎕/min, each hippocampus bilaterally). FCE was administered orally once a day (100, 250, 500 mg/kg) for 4 weeks after the Aβ (1-42) injection. The acquisition of learning and retention of memory were tested using the Morris water maze. Aβ accumulation and Aβ clearance in the hippocampus were observed using immunostaining. Aβ (1-42) level in plasma was confirmed using enzyme-linked immunosorbent assay (ELISA). FCE significantly shortened the escape latencies during acquisition training trials. FCE significantly increased the number of target heading to the platform site and significantly shortened the time for the 1^sttargetheadingduringtheretentiontesttrial.FCEsignificantlyattenuatedtheAβ accumulation in the hippocampus produced by Aβ (1-42) injection. FCE significantly increased LRP-1 expression around vessels in the hippocampus and Aβ (1-42) levels in plasma. The results suggest that FCE improved cognitive impairment by ameliorate Aβ clearance and Aβ accumulation in the hippocampus. FCE may be a beneficial herbal formulation in treating cognitive impairment including Alzheimer's disease.

• Transactions of the Society of Information Storage Systems
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• v.3 no.2
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• pp.94-112
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• 2007

Nano-sized inverted domain dots in ferroelectric materials have potential application in ultrahigh-density rewritable data storage systems. Herein, a data storage system is presented based on scanning non-linear dielectric microscopy and a thin film of ferroelectric single-crystal lithium tantalite. Through domain engineering, we succeeded to form an smallest artificial nano-domain single dot of 5.1 nm in diameter and artificial nano-domain dot-array with a memory density of 10.1 Tbit/$inch^2$ and a bit spacing of 8.0 nm, representing the highest memory density for rewritable data storage reported to date. Sub-nanosecond (500psec) domain switching speed also has been achieved. Next, long term retention characteristic of data with inverted domain dots is investigated by conducting heat treatment test. Obtained life time of inverted dot with the radius of 50nm was 16.9 years at $80^{\circ}C$. Finally, actual information storage with low bit error and high memory density was performed. A bit error ratio of less than $1\times10^{-4}$ was achieved at an areal density of 258 Gbit/inch2. Moreover, actual information storage is demonstrated at a density of 1 Tbit/$inch^2$.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.20 no.12
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• pp.1017-1021
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• 2007

To implement tera bit level non-volatile memories of low power and fast operation, proving statistical reproductivity and satisfying reliabilities at the nano-scale are a key challenge. We fabricate the charge trapping nano scaled SONOS unit memories and 64 bit flash arrays and evaluate reliability and performance of them. In case of the dielectric stack thickness of 4.5 /9.3 /6.5 nm with the channel width and length of 34 nm and 31nm respectively, the device has about 3.5 V threshold voltage shift with write voltage of $10\;{\mu}s$, 15 V and erase voltage of 10 ms, -15 V. And retention and endurance characteristics are above 10 years and $10^5$ cycle, respectively. The device with LDD(Lightly Doped Drain) process shows reduction of short channel effect and GIDL(Gate Induced Drain Leakage) current. Moreover we investigate three different types of flash memory arrays.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.151-151
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• 2010

In this paper, the electrically properties of nonvolatile memory (NVM) using multi-stacks gate insulators of oxide-nitride-oxynitride (ONOn) and active layer of the low temperature polycrystalline silicon (LTPS) were investigated. From hydrogenated amorphous silicon (a-Si:H), the LTPS thin films with high crystalline fraction of 96% and low surface's roughness of 1.28 nm were fabricated by the metal induced crystallization (MIC) with annealing conditions of $650^{\circ}C$ for 5 hours on glass substrates. The LTPS thin film transistor (TFT) or the NVM obtains a field effect mobility of ($\mu_{FE}$) $10\;cm^2/V{\cdot}s$, threshold voltage ($V_{TH}$) of -3.5V. The results demonstrated that the NVM has a memory window of 1.6 V with a programming and erasing (P/E) voltage of -14 V and 14 V in 1 ms. Moreover, retention properties of the memory was determined exceed 80% after 10 years. Therefore, the LTPS fabricated by the MIC became a potential material for NVM application which employed for the system integration of the panel display.