• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2005년도 추계종합학술대회
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• pp.805-808
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• 2005

In this study, the design of advanced LVDS(Low Voltage Differential Signaling) I/O interface circuit with new structural low triggering ESD(Electro-Static Discharge) protection circuit was investigated. Due to the differential transmission technique and low power consumption at same time. maximum transmission data ratio of designed LVDS transmitter was simulated to 5Gbps, Also, the LIGCSCR(Latch-up Immune Gate Coupled SCR)was designed. It consists of PLVTSCR (P-type Low Voltage Trigger SCR), control NMOS and RC network. The triggering voltage was simulated to 3.6V. And the latch-up characteristics were improved. Finally, we performed the layout high speed I/O interlace circuit with the low triggered ESD protection device in one-chip.

• JSTS:Journal of Semiconductor Technology and Science
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• 제14권2호
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• pp.227-234
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• 2014

A transceiver for a high-speed inductive-coupling link is proposed. The bi-phase modulation (BPM) signaling scheme is used due to its good noise immunity. The transmitter utilizes a complementary switching method to remove glitches in transmitted data. To increase the timing margin on the receiver side, an integrating receiver with a pre-charging equalizer is employed. The proposed transceiver was implemented via a 130-nm CMOS process. The measured timing window for a $10^{-12}$ bit error rate (BER) at 1.8 Gb/s was 0.33 UI.

• 한국철도학회:학술대회논문집
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• 한국철도학회 2007년도 춘계학술대회 논문집
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• pp.1388-1397
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• 2007

In order to install ATP system for KTX safety running, a study has been done to examine measures to ensure the interface between KTX and ATP system. Although onboard signaling system is efficient and has been verified both at home and abroad, alternatives for optimum installation shall be adopted so as to show designated performance taking into account the given peripheral device. A solution to interface between beacon and onboard system shall be presented especially for the KTX, which runs on both high speed and conventional line (ATP-ATS). Furthermore, the method for controlling the braking process and recorder shall be studied.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2008년도 제39회 하계학술대회
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• pp.1065-1066
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• 2008

2005년 8월 서울기점 54km에 위치한 고속선 신호기계실에 낙뢰가 발생함에 따라 신호기계실 내부에 설치된 방호스위치 외부회로의 전원공급용 DC/DC 컨버터가 소손 되었다. 그 결과, 폐색구간 작업자 보호용 방호스위치, 역구내 작업자 보호용 방호스위치 계전기 낙하가 발생하여 운행중인 고속선 열차의 정지 속도 코드가 차량에 현시 되었다. 이후 장애 절차에 따라 장애 유지보수가 완료되었지만, 상행선 7개, 하행선 3개 열차가 17분${\sim}$58분간 운행 지연되었다. 본 논문에서는 이러한 낙뢰 장애사고를 분석함으로서 신뢰할 수 있는 신호기계실 낙뢰 피해 방지 방안에 대해 분석하였다.

• 전기학회논문지
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• 제63권12호
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• pp.1747-1751
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• 2014

Interlocking system along with point machine for efficient route control secures safety of train operation by interchanging information each other. However, various types of interlocking system and point machine operating on bender specific interface bring obstacles to effective maintenance and safety. In this paper, we have investigated on interface methods to suggest standard interface module applicable to various operating system

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2002년도 International Meeting on Information Display
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• pp.567-570
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• 2002

The LVDS (Low Voltage Differential Signaling) I/O cells, fully compatible with ANSI TIA/ EIA-644 LVDS standard, are designed using a 0.35${\mu}m$ standard CMOS technology. With a single 3V supply, the core cells operate at 1.34Gbps and power consumption of the output driver and the input receiver is 10. 5mW and 4.2mW, respectively. In the output driver, we employ the DCMFB (Dynamic Common-Mode FeedBack) circuit which can control the DC offset voltage of differential output signals. The SPICE simulation result of the proposed output driver shows that the variation of the DC offset voltage is 15.6% within a permissible range. In the input receiver, the proposed dual input stage with a positive feedback latch covers rail-to-rail input common-mode range and enables a high-speed, low-power operation. 5-channels of the proposed LVDS I/O pair can handle display data up to 8-bit gray scale and UXGA resolution.

• 한국철도학회:학술대회논문집
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• 한국철도학회 2008년도 춘계학술대회 논문집
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• pp.1922-1929
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• 2008

In order to install ATP system for KTX safety running, a study has been done to examine measures to ensure the interface between KTX and ATP system. Although onboard signaling system is efficient and has been verified both at home and abroad, alternatives for optimum installation shall be adopted so as to show designated performance taking into account the given peripheral device. A solution to interface between beacon and onboard system shall be presented especially for the KTX, which runs on both high speed and conventional line (ATP-ATS). Furthermore, the method for controlling the braking process and recorder shall be studied.

• 한국철도학회:학술대회논문집
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• 한국철도학회 2009년도 춘계학술대회 논문집
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• pp.442-446
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• 2009

As the railway transportation is getting faster and its operation speed has increased rapidly, its signal control has been complicated. For real time signal processing it is very important to prohibit any critical error from causing the system to malfunction. Today, most of the railroad's controling communications between wayside and train are made in one way. Therefore, by using a forward error correction technique, which receiver can actively correct the signal error, we can increase the performance and the stability of the railroad signaling system. In this paper, we introduce low density parity check(LDPC) that is used by next generation wireless communications and DMB technique. We verified that we can achieve low bit error rate(BER) in high signal to noise ratio(SNR) by using LDPC.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2006년도 하계종합학술대회
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• pp.621-622
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• 2006

This paper presents the design of LVDS(Low-Voltage-Differential-Signaling) driver circuit for Gb/s-per-pin operation using BiCMOS process technology. To reduce chip area, LVDS driver's switching devices were replaced with lateral bipolar devices. The designed lateral bipolar transister's common emitter current gain($\beta$) is 20 and device's emitter size is 2*10um. Also the proposed LVDS driver is operated at 2.5V and the maximum data rate is 2.8Gb/s approximately.

• 한국통신학회논문지
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• 제30권4A호
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• pp.241-249
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• 2005

ATM based MPLS(Multiprotocol Label Switching) is discussed for its provisioning QOS commitment capabilities, Traffic engineering and smooth migration for BcN in Korea. At this time, due to the comprehensive nature of ATM protocol, ATM has been adapted as the backbone system for carrying Internet traffic[1,2,3,4]. This paper presents preventive congestion control mechanisms for detecting HTR(Hard-To-Reach) LSP(Label Switched Path) in ATM based MPLS systems. In particular, we have introduced a HTR LSP detection method using network signaling information in an ATM layer. MPLS related studies can cover LSP failures in a physical layer fault, it can not impact network congestion status. Here we will present the research results for introducing HTR LSP detection methods and control mechanisms and this mechanism can be implementing as SOC for high speed processing a packet header. We concluded that it showed faster congestion avoidance abilities with a more reduced system load and maximized the efficiency of network resources by restricting ineffective machine attempts.