Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)
- 2005.11a
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- Pages.805-808
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- 2005
The Design of LVDS Driver with ESD protection device of low voltage triggering characteristics
저 전압 트리거형 ESD 보호소자를 탑재한 LVDS Driver 설계
- Yuk, Seung-Bum (Electronic Engineering Seokyeong University) ;
- Kim, Kui-Dong (Electronic and Telecommunication Research Institute) ;
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Kwon, Jong-Ki
(Electronic and Telecommunication Research Institute)
;
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Koo, Yong-Seo
(Electronic Engineering Seokyeong University)
- Published : 2005.11.26
Abstract
In this study, the design of advanced LVDS(Low Voltage Differential Signaling) I/O interface circuit with new structural low triggering ESD(Electro-Static Discharge) protection circuit was investigated. Due to the differential transmission technique and low power consumption at same time. maximum transmission data ratio of designed LVDS transmitter was simulated to 5Gbps, Also, the LIGCSCR(Latch-up Immune Gate Coupled SCR)was designed. It consists of PLVTSCR (P-type Low Voltage Trigger SCR), control NMOS and RC network. The triggering voltage was simulated to 3.6V. And the latch-up characteristics were improved. Finally, we performed the layout high speed I/O interlace circuit with the low triggered ESD protection device in one-chip.
Keywords